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2024-09-27 - 07:16
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackfslot7.osadl.org (updated Fri Sep 27, 2024 00:46:16)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1083817997719,39cyclictest1098562-21expr19:35:137
1083811997433,19cyclictest680-21systemd-logind21:50:011
1083811997356,16cyclictest1080717-21kworker/u16:1+events_unbound19:10:031
108381799688,60cyclictest0-21swapper/721:52:497
1083812996810,19cyclictest0-21swapper/222:10:142
108381199667,19cyclictest0-21swapper/100:24:211
108381799657,39cyclictest0-21swapper/721:30:157
108381199655,20cyclictest0-21swapper/119:17:291
108381199645,19cyclictest0-21swapper/123:04:131
108381199645,19cyclictest0-21swapper/121:06:221
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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