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2024-07-16 - 08:21
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackfslot0.osadl.org (updated Mon Jul 15, 2024 12:54:42)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
167494499206176,19cyclictest0-21swapper/1008:30:172
167494499206176,19cyclictest0-21swapper/1008:30:162
167491599194183,9cyclictest0-21swapper/010:50:160
167491599194183,9cyclictest0-21swapper/010:50:150
167492099181163,15cyclictest0-21swapper/109:50:161
167495199171161,6cyclictest0-21swapper/1710:50:169
167495199171161,6cyclictest0-21swapper/1710:50:169
16749429917079,65cyclictest0-21swapper/807:50:1630
16749609916987,56cyclictest0-21swapper/2610:35:1719
16749609916987,56cyclictest0-21swapper/2610:35:1719
16749559916982,56cyclictest0-21swapper/2112:15:1414
16749559916982,56cyclictest0-21swapper/2112:15:1414
16749569916882,55cyclictest0-21swapper/2207:35:1615
16749599916789,5cyclictest0-21swapper/2507:30:1418
16749589916784,52cyclictest0-21swapper/2412:15:1517
16749589916784,52cyclictest0-21swapper/2412:15:1517
167494399167151,14cyclictest0-21swapper/909:50:1731
16749229916786,50cyclictest0-21swapper/212:15:1512
16749229916786,50cyclictest0-21swapper/212:15:1512
16749609916673,80cyclictest0-21swapper/2607:10:1919
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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