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2024-07-16 - 08:21
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rackeslot6.osadl.org (updated Mon Jul 15, 2024 12:44:50)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
98997599152133,5cyclictest1025720-21kworker/u8:1+events_unbound09:12:141
9899759910395,6cyclictest1009411-21kworker/u8:2+flush-179:008:40:001
9899759910390,9cyclictest1015375-21latency_hist08:30:021
9899759910295,4cyclictest1056619-21kworker/u8:1+events_unbound11:00:011
9899719910185,12cyclictest2791555-21systemd-journal12:05:000
989975999689,5cyclictest1025720-21kworker/u8:1+flush-179:009:05:011
989975999587,5cyclictest1042690-21kworker/u8:0+flush-179:010:00:001
989975999384,6cyclictest1074791-21kworker/u8:2+flush-179:012:15:011
989975999284,6cyclictest1092297-21kworker/u8:1+events_unbound12:30:021
989975999283,7cyclictest1082748-21kworker/u8:3+events_unbound12:10:011
989975998681,4cyclictest1013834-21kworker/u8:3+flush-179:008:45:321
989971998678,6cyclictest1007424-21latency_hist08:05:020
989975998577,6cyclictest1032555-21kworker/u8:3+events_unbound09:35:021
989975998479,4cyclictest1056619-21kworker/u8:1+flush-179:011:04:551
989975998477,5cyclictest1045286-21kworker/u8:2+events_unbound10:05:011
989975998477,4cyclictest1074791-21kworker/u8:2+events_unbound11:50:011
989975998378,4cyclictest1018861-21kworker/u8:0+events_unbound08:40:301
989975998373,8cyclictest1058260-21latency_hist10:40:011
989975998174,5cyclictest997830-21kworker/u8:3+flush-179:007:35:161
989975998174,5cyclictest993901-21kworker/u8:1+events_unbound07:25:311
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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