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2024-11-22 - 10:15
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot3.osadl.org (updated Fri Nov 22, 2024 00:43:49)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3049695997445,28cyclictest3107379-21kworker/1:122:20:141
3049695997443,29cyclictest3107379-21kworker/1:123:20:151
3049695997440,32cyclictest3064689-21kworker/1:120:25:131
3049695997342,29cyclictest3138503-21kworker/1:023:50:001
3049695997338,32cyclictest3064689-21kworker/1:120:50:151
3049695997337,35cyclictest3107379-21kworker/1:123:15:151
3049695997333,37cyclictest293642-1kworker/1:2H00:10:211
3049695997241,29cyclictest293642-1kworker/1:2H22:30:171
3049695997240,30cyclictest293642-1kworker/1:2H21:50:011
3049695997236,34cyclictest293642-1kworker/1:2H20:55:111
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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