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2024-11-22 - 17:00
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot4.osadl.org (updated Fri Nov 22, 2024 12:46:21)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
124091212191,9phc2sys0-21swapper/307:05:473
180362849,17sleep10-21swapper/107:08:221
181172774,19sleep20-21swapper/207:09:202
57298660,19rtkit-daemon6188-21diskstats09:00:141
205792650,3sleep120577-21apt07:15:011
96302620,1sleep10-21swapper/108:00:011
247142590,3sleep1231rcuc/112:00:181
18455995841,14cyclictest9-21ksoftirqd/007:30:000
132442560,2sleep00-21swapper/009:15:140
18457995541,9cyclictest33-21ksoftirqd/209:40:122
18457995440,8cyclictest33-21ksoftirqd/209:00:112
18457995439,9cyclictest33-21ksoftirqd/211:00:092
18457995438,10cyclictest33-21ksoftirqd/211:20:112
314082530,3sleep231407-21tune2fs12:15:162
18457995246,4cyclictest33-21ksoftirqd/208:20:002
2109924942,3sleep125-21ksoftirqd/110:45:111
18458994931,15cyclictest41-21ksoftirqd/311:50:373
18457994943,3cyclictest33-21ksoftirqd/207:45:002
18456994942,4cyclictest25-21ksoftirqd/107:40:011
18455994933,13cyclictest9-21ksoftirqd/008:15:080
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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