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2024-11-22 - 16:48
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot3.osadl.org (updated Fri Nov 22, 2024 12:45:50)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
166942202168,23sleep30-21swapper/307:06:253
166672202169,22sleep10-21swapper/107:06:031
168552201167,23sleep20-21swapper/207:08:332
166712201168,22sleep00-21swapper/007:06:060
957621530,6sleep21726599cyclictest08:00:152
147491930,69ptp4l0-21swapper/307:10:003
17265997010,58cyclictest21632-21kworker/2:007:30:292
104232660,4sleep20-21swapper/210:20:242
17264996129,6cyclictest25-21ksoftirqd/111:15:261
17264996128,7cyclictest25-21ksoftirqd/109:10:231
1726599607,51cyclictest23488-21kworker/2:112:15:292
17264995924,9cyclictest25-21ksoftirqd/111:45:261
17264995921,4cyclictest25-21ksoftirqd/109:28:251
17264995816,7cyclictest25-21ksoftirqd/109:55:231
17264995617,7cyclictest25-21ksoftirqd/111:53:161
147491560,1ptp4l401ktimersoftd/310:05:213
17264995523,5cyclictest25-21ksoftirqd/112:25:281
17264995519,8cyclictest25-21ksoftirqd/112:05:441
17264995517,7cyclictest25-21ksoftirqd/110:50:051
17264995517,7cyclictest25-21ksoftirqd/109:22:481
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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