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2024-07-16 - 08:36
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot3.osadl.org (updated Mon Jul 15, 2024 12:46:23)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
825991201178,10phc2sys0-21swapper/307:07:153
825991201178,10phc2sys0-21swapper/307:07:153
1142121430,2sleep10-21swapper/108:15:241
576981380,110rtkit-daemon10133-21apache207:08:580
576981380,110rtkit-daemon10133-21apache207:08:580
364021120,5sleep31223299cyclictest08:00:163
988728057,10sleep10-21swapper/107:05:131
988728057,10sleep10-21swapper/107:05:121
12372770,8sleep31223299cyclictest12:25:413
825591750,1ptp4l401ktimersoftd/311:27:343
103452750,19sleep20-21swapper/207:05:172
103452750,19sleep20-21swapper/207:05:172
825591720,1ptp4l401ktimersoftd/307:51:393
825591640,2ptp4l26393-21fschecks_time09:55:163
825591630,1ptp4l401ktimersoftd/308:17:343
825591610,1ptp4l401ktimersoftd/312:01:113
12232995741,9cyclictest41-21ksoftirqd/307:25:113
825591560,1ptp4l391rcuc/308:28:153
178462560,2sleep20-21swapper/211:55:172
12232995437,8cyclictest41-21ksoftirqd/311:45:103
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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