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2024-11-22 - 05:11

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #c, slot #8

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rackcslot8s.osadl.org (updated Fri Nov 22, 2024 00:46:08)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
268222640,0sleep40-21swapper/421:13:384
3207626050,6sleep20-21swapper/219:07:292
132091570,6ptp4l0-21swapper/519:06:285
3223625645,7sleep70-21swapper/719:09:357
3192625543,7sleep30-21swapper/319:05:383
1335915532,7phc2sys0-21swapper/019:09:420
132091550,5ptp4l0-21swapper/119:09:591
3199424838,6sleep60-21swapper/619:06:296
3210524634,7sleep40-21swapper/419:07:554
132091340,1ptp4l26610-21fw_forwarded_lo00:00:111
132091340,0ptp4l0-21swapper/100:05:211
132091340,0ptp4l0-21swapper/100:05:201
132091340,0ptp4l0-21swapper/022:20:120
132091330,5ptp4l0-21swapper/100:25:121
132091330,0ptp4l0-21swapper/123:13:581
132091330,0ptp4l0-21swapper/122:23:121
132091330,0ptp4l0-21swapper/122:11:311
132091330,0ptp4l0-21swapper/120:15:131
132091320,0ptp4l0-21swapper/122:26:441
132091310,1ptp4l3275-21ssh00:10:354
132091310,0ptp4l0-21swapper/522:54:215
132091310,0ptp4l0-21swapper/522:34:345
132091310,0ptp4l0-21swapper/223:13:252
132091310,0ptp4l0-21swapper/123:45:231
132091310,0ptp4l0-21swapper/123:09:551
132091300,6ptp4l0-21swapper/400:22:214
132091300,3ptp4l0-21swapper/123:54:401
132091300,3ptp4l0-21swapper/122:16:021
132091300,1ptp4l29091-21ssh21:56:052
132091300,0ptp4l0-21swapper/521:50:235
132091300,0ptp4l0-21swapper/521:38:325
132091300,0ptp4l0-21swapper/123:22:441
132091300,0ptp4l0-21swapper/122:30:341
132091300,0ptp4l0-21swapper/121:43:171
132091300,0ptp4l0-21swapper/121:34:141
132091300,0ptp4l0-21swapper/121:34:131
132091300,0ptp4l0-21swapper/121:20:221
132091300,0ptp4l0-21swapper/120:38:571
132091300,0ptp4l0-21swapper/100:39:231
132091300,0ptp4l0-21swapper/100:14:171
132091290,0ptp4l0-21swapper/422:44:134
132091290,0ptp4l0-21swapper/123:40:151
132091290,0ptp4l0-21swapper/121:27:401
132091290,0ptp4l0-21swapper/000:08:550
132091290,0ptp4l0-21swapper/000:08:540
132091280,0ptp4l0-21swapper/621:28:546
132091280,0ptp4l0-21swapper/600:18:286
132091280,0ptp4l0-21swapper/523:08:145
132091280,0ptp4l0-21swapper/522:42:305
132091280,0ptp4l0-21swapper/522:23:335
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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