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2024-11-25 - 15:12
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rackcslot8.osadl.org (updated Mon Nov 25, 2024 00:49:21)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
862899352153,198cyclictest151rcu_preempt22:43:3112
882499299100,37cyclictest151rcu_preempt22:58:4021
88249929799,3cyclictest151rcu_preempt22:03:0721
86289929555,43cyclictest151rcu_preempt00:37:2012
86189925563,12cyclictest151rcu_preempt23:39:240
2482912170,209ptp4l0-21swapper/119:05:221
88029917151,109cyclictest0-21swapper/2521:15:4318
88029916141,92cyclictest0-21swapper/2521:24:4718
86379915370,55cyclictest0-21swapper/323:25:4423
88029915031,74cyclictest0-21swapper/2520:40:1318
88029915031,74cyclictest0-21swapper/2520:40:1318
88029915030,119cyclictest0-21swapper/2522:43:2118
86289914847,88cyclictest0-21swapper/221:57:0012
88029914425,101cyclictest0-21swapper/2522:54:3718
88029914324,93cyclictest0-21swapper/2522:30:0018
8713991425,123cyclictest0-21swapper/1323:13:055
86379914216,34cyclictest0-21swapper/322:20:0123
86689914151,59cyclictest0-21swapper/722:12:4429
86379913718,108cyclictest0-21swapper/321:34:3623
8637991350,83cyclictest0-21swapper/323:32:5423
86689913449,60cyclictest0-21swapper/700:28:5329
86689913324,72cyclictest0-21swapper/723:24:1229
86289913331,101cyclictest0-21swapper/223:46:0112
86689913256,64cyclictest0-21swapper/721:43:5329
86689913247,58cyclictest0-21swapper/720:05:2629
86689913247,58cyclictest0-21swapper/720:05:2529
86689913228,69cyclictest0-21swapper/722:50:0129
86689913225,65cyclictest0-21swapper/723:55:4429
86929913121,105cyclictest0-21swapper/1000:27:252
86689913130,71cyclictest0-21swapper/723:12:5929
86689913129,70cyclictest0-21swapper/722:38:1529
86689913129,66cyclictest0-21swapper/721:17:1529
86689913128,69cyclictest0-21swapper/720:51:5529
86689913128,69cyclictest0-21swapper/720:51:5429
86689913128,67cyclictest0-21swapper/721:26:1529
86689913128,67cyclictest0-21swapper/719:11:3729
86689913127,66cyclictest0-21swapper/700:20:1929
86289913127,102cyclictest0-21swapper/222:00:1312
8736991300,83cyclictest0-21swapper/1621:30:208
86929913022,107cyclictest0-21swapper/1023:49:312
86689913028,66cyclictest0-21swapper/720:20:2229
86689913028,66cyclictest0-21swapper/720:20:2229
8628991300,89cyclictest0-21swapper/200:21:5012
86689912946,55cyclictest0-21swapper/700:37:3629
86689912932,67cyclictest0-21swapper/721:53:3129
86689912930,71cyclictest0-21swapper/723:44:3129
86689912927,66cyclictest0-21swapper/722:08:0529
86689912836,60cyclictest0-21swapper/722:22:1229
86689912827,66cyclictest0-21swapper/721:57:1429
86689912827,65cyclictest0-21swapper/700:12:0129
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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