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2024-07-16 - 08:46
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rackcslot8.osadl.org (updated Mon Jul 15, 2024 12:49:08)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
529099495493,1cyclictest11287-21lspci08:28:452
541299356156,0cyclictest185-21ksoftirqd/2811:33:5021
537799337140,166cyclictest151rcu_preempt11:06:5013
537799337140,166cyclictest151rcu_preempt11:06:5013
23762321313,6sleep300-21swapper/3007:05:2224
54129917756,120cyclictest0-21swapper/2811:20:3421
54129917756,120cyclictest0-21swapper/2811:20:3321
54129916414,148cyclictest151rcu_preempt11:27:2721
54129916414,148cyclictest151rcu_preempt11:27:2721
53659916126,100cyclictest0-21swapper/1811:35:1610
53659916026,118cyclictest0-21swapper/1809:35:0110
53659915826,85cyclictest0-21swapper/1808:29:5010
54129915435,65cyclictest0-21swapper/2811:55:0121
231191154149,3phc2sys0-21swapper/207:09:4712
53659915319,109cyclictest0-21swapper/1808:35:0910
53659915220,108cyclictest0-21swapper/1810:14:4110
53659915220,108cyclictest0-21swapper/1810:14:4010
54129915131,96cyclictest0-21swapper/2809:15:2321
54129914959,42cyclictest0-21swapper/2807:24:3721
52739914996,53cyclictest64-21ksoftirqd/809:46:5830
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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