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2024-11-22 - 10:00
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackcslot8.osadl.org (updated Fri Nov 22, 2024 00:49:01)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1678399325127,1cyclictest151rcu_preempt21:57:1420
1678399325127,1cyclictest151rcu_preempt21:57:1420
2482913190,311ptp4l0-21swapper/119:06:231
167979924547,2cyclictest151rcu_preempt22:11:1125
167979924547,2cyclictest151rcu_preempt22:11:1125
166849918740,1cyclictest151rcu_preempt23:37:2127
167879917433,104cyclictest0-21swapper/2822:00:1721
167299917224,91cyclictest0-21swapper/1622:07:038
167299917024,126cyclictest0-21swapper/1622:25:018
167299917024,126cyclictest0-21swapper/1622:25:018
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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