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2024-07-16 - 08:38
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rackcslot6.osadl.org (updated Mon Jul 15, 2024 00:46:39)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
102011321050,0sleep30-21swapper/320:45:123
96100029456,12sleep70-21swapper/719:08:257
96111229073,12sleep20-21swapper/219:09:572
961321998819,36cyclictest0-21swapper/322:15:123
961321998816,39cyclictest0-21swapper/323:35:123
96096228853,11sleep50-21swapper/519:07:515
96082728858,24sleep40-21swapper/419:05:574
961321998716,38cyclictest0-21swapper/320:20:123
961336998616,70cyclictest0-21swapper/523:00:125
961321998616,37cyclictest0-21swapper/323:10:123
961296998616,35cyclictest0-21swapper/022:35:110
961321998517,37cyclictest0-21swapper/300:10:123
961321998517,37cyclictest0-21swapper/300:10:113
961336998434,35cyclictest0-21swapper/519:20:125
961321998416,35cyclictest0-21swapper/323:55:123
961296998415,37cyclictest0-21swapper/023:45:110
95864828461,11sleep30-21swapper/319:05:073
961336998316,38cyclictest0-21swapper/521:30:115
961336998315,36cyclictest0-21swapper/522:05:125
10726152820,0sleep20-21swapper/221:40:542
961336998116,34cyclictest0-21swapper/520:10:125
96099028158,12sleep60-21swapper/619:08:156
96085028155,20sleep00-21swapper/019:06:170
10354442800,0sleep71035443-21sh21:10:237
961344997914,35cyclictest0-21swapper/621:05:126
96094727856,11sleep10-21swapper/119:07:391
10135152770,0sleep00-21swapper/020:35:000
11740772750,0sleep20-21swapper/223:05:202
10554172740,0sleep20-21swapper/221:27:082
961321997316,33cyclictest0-21swapper/320:55:123
10981042720,0sleep30-21swapper/322:02:503
96129699710,38cyclictest0-21swapper/019:10:120
11681402700,2sleep656-21ksoftirqd/623:00:206
12566432690,0sleep50-21swapper/500:15:015
12566432690,0sleep50-21swapper/500:15:015
12318722680,0sleep70-21swapper/723:54:207
10743642680,0sleep50-21swapper/521:43:215
96131399678,23cyclictest0-21swapper/223:25:122
961313993610,16cyclictest1185370-21ssh23:15:122
961302993114,16cyclictest0-21swapper/121:20:111
961302993111,16cyclictest1011302-21expr20:30:121
961313993014,13cyclictest0-21swapper/219:30:122
961296993014,15cyclictest0-21swapper/020:50:110
961350992913,15cyclictest0-21swapper/722:25:127
961344992913,4cyclictest0-21swapper/600:35:116
961344992913,15cyclictest0-21swapper/620:05:126
961302992913,15cyclictest0-21swapper/120:15:121
961302992913,15cyclictest0-21swapper/100:25:121
961302992911,17cyclictest0-21swapper/119:35:121
96132899281,16cyclictest1039940-21cpuspeed_turbos21:15:124
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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