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2024-07-16 - 08:18
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackcslot6.osadl.org (updated Mon Jul 15, 2024 00:46:39)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
102011321050,0sleep30-21swapper/320:45:123
96100029456,12sleep70-21swapper/719:08:257
96111229073,12sleep20-21swapper/219:09:572
961321998819,36cyclictest0-21swapper/322:15:123
961321998816,39cyclictest0-21swapper/323:35:123
96096228853,11sleep50-21swapper/519:07:515
96082728858,24sleep40-21swapper/419:05:574
961321998716,38cyclictest0-21swapper/320:20:123
961336998616,70cyclictest0-21swapper/523:00:125
961321998616,37cyclictest0-21swapper/323:10:123
961296998616,35cyclictest0-21swapper/022:35:110
961321998517,37cyclictest0-21swapper/300:10:123
961321998517,37cyclictest0-21swapper/300:10:113
961336998434,35cyclictest0-21swapper/519:20:125
961321998416,35cyclictest0-21swapper/323:55:123
961296998415,37cyclictest0-21swapper/023:45:110
95864828461,11sleep30-21swapper/319:05:073
961336998316,38cyclictest0-21swapper/521:30:115
961336998315,36cyclictest0-21swapper/522:05:125
10726152820,0sleep20-21swapper/221:40:542
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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