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2024-11-22 - 10:49
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot2.osadl.org (updated Fri Nov 22, 2024 00:43:23)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2324027254,8sleep10-21swapper/119:08:191
2317227135,31sleep00-21swapper/019:07:360
321222690,0sleep10-21swapper/122:19:471
113362670,1sleep011334-21seq21:54:440
260872580,0sleep00-21swapper/022:53:340
2353099330,1cyclictest22901-21users00:09:531
23530992915,13cyclictest0-21swapper/123:10:291
23529992910,1cyclictest0-21swapper/023:24:240
23529992826,1cyclictest7237-21ntp_states22:29:480
2352999280,27cyclictest0-21swapper/021:11:080
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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