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2024-11-22 - 02:56

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #b, slot #8

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rackbslot8s (updated Thu Nov 21, 2024 12:44:16)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
789532138113,8sleep20-21swapper/207:08:522
789142127113,9sleep10-21swapper/107:08:201
787532126113,8sleep60-21swapper/607:05:596
788712122107,10sleep30-21swapper/307:07:413
789592120106,9sleep70-21swapper/707:08:587
789702119105,9sleep00-21swapper/007:09:070
787512117103,9sleep40-21swapper/407:05:574
78947211399,9sleep50-21swapper/507:08:475
7927599103100,3cyclictest573-21snmpd12:11:082
79291991020,99cyclictest0-21swapper/610:23:096
792889910299,3cyclictest573-21snmpd10:24:425
79288991020,101cyclictest0-21swapper/511:22:515
79288991020,101cyclictest0-21swapper/510:47:135
792809910299,3cyclictest573-21snmpd08:42:383
792809910297,2cyclictest573-21snmpd12:16:313
792759910299,3cyclictest573-21snmpd09:12:102
792759910299,3cyclictest573-21snmpd07:38:192
79267991020,99cyclictest0-21swapper/010:39:000
79267991020,101cyclictest0-21swapper/011:32:560
79295991010,100cyclictest0-21swapper/712:10:467
792919910199,2cyclictest573-21snmpd08:53:446
79291991010,99cyclictest0-21swapper/608:20:596
79291991010,101cyclictest0-21swapper/611:40:006
79291991010,101cyclictest0-21swapper/611:25:486
792889910199,2cyclictest175147-21cat09:50:175
792889910198,3cyclictest573-21snmpd10:36:345
792889910197,4cyclictest573-21snmpd11:48:465
79288991010,99cyclictest0-21swapper/512:30:295
79288991010,100cyclictest0-21swapper/507:41:015
79288991010,0cyclictest0-21swapper/508:56:425
79284991010,100cyclictest0-21swapper/410:16:174
79284991010,100cyclictest0-21swapper/408:10:564
792809910199,2cyclictest573-21snmpd07:36:553
792759910199,2cyclictest573-21snmpd11:47:282
792759910199,1cyclictest573-21snmpd11:51:062
792759910199,1cyclictest573-21snmpd08:45:512
792759910199,1cyclictest573-21snmpd08:45:502
79275991010,100cyclictest0-21swapper/209:55:142
79272991010,0cyclictest0-21swapper/112:12:101
792679910199,2cyclictest573-21snmpd08:12:430
792679910198,3cyclictest573-21snmpd08:31:230
792679910197,4cyclictest323333-21cat12:30:190
79267991010,0cyclictest0-21swapper/011:51:180
79295991000,100cyclictest0-21swapper/712:08:587
79295991000,100cyclictest0-21swapper/711:57:587
79295991000,100cyclictest0-21swapper/710:18:407
79295991000,100cyclictest0-21swapper/708:38:247
792919910099,1cyclictest573-21snmpd10:41:336
792919910099,1cyclictest573-21snmpd10:15:456
792919910099,1cyclictest573-21snmpd07:53:526
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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