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2024-07-16 - 08:11
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackbslot1.osadl.org (updated Sat Jun 29, 2024 12:44:35)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
13340892216170,36sleep10-21swapper/107:06:401
13341812215191,13sleep00-21swapper/007:07:520
13343492204179,14sleep20-21swapper/207:09:592
13340412204180,13sleep30-21swapper/307:06:023
133457499950,2cyclictest1428675-21snmp_ryswitch2.09:05:012
1334571997855,3cyclictest1526727-21chrome11:05:001
133457499570,19cyclictest1476896-21snmp_wlanpowerc10:05:012
1334579995550,3cyclictest1533334-31munin-html11:10:313
1334571995551,3cyclictest1488269-31munin-html10:15:391
1334579995442,11cyclictest1388463-21/usr/share/muni08:15:093
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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