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2024-11-22 - 11:50
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack9slot3.osadl.org (updated Wed Oct 02, 2019 00:45:06)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
35452246171,19sleep20-21swapper/219:07:562
36162244170,45sleep10-21swapper/119:08:501
36182233169,54sleep30-21swapper/319:08:523
35132223193,19sleep00-21swapper/019:07:300
69442510,8sleep2321ktimersoftd/223:10:192
3912994919,6cyclictest33-21ksoftirqd/221:35:042
3912994844,2cyclictest33-21ksoftirqd/221:20:142
3912994742,3cyclictest33-21ksoftirqd/221:10:172
391299472,3cyclictest121rcu_preempt21:18:232
3912994621,3cyclictest33-21ksoftirqd/222:55:012
391299460,7cyclictest33-21ksoftirqd/222:38:372
3912994541,3cyclictest33-21ksoftirqd/200:10:012
3912994540,3cyclictest33-21ksoftirqd/219:45:132
3912994540,2cyclictest33-21ksoftirqd/220:20:172
3912994523,8cyclictest33-21ksoftirqd/222:15:092
3912994440,2cyclictest33-21ksoftirqd/223:39:592
3912994439,3cyclictest33-21ksoftirqd/220:50:062
3912994420,3cyclictest33-21ksoftirqd/221:40:162
3912994414,6cyclictest33-21ksoftirqd/221:10:002
391299440,5cyclictest121rcu_preempt22:05:172
3911994439,3cyclictest25-21ksoftirqd/122:10:061
3912994339,2cyclictest33-21ksoftirqd/220:35:092
3912994338,3cyclictest33-21ksoftirqd/222:20:182
3912994338,3cyclictest33-21ksoftirqd/220:00:122
3912994320,4cyclictest33-21ksoftirqd/221:33:352
3912994320,3cyclictest33-21ksoftirqd/221:50:082
3912994318,3cyclictest33-21ksoftirqd/223:46:382
3912994317,5cyclictest33-21ksoftirqd/200:03:402
3912994314,3cyclictest33-21ksoftirqd/222:30:102
3912994314,3cyclictest33-21ksoftirqd/222:30:092
3912994238,3cyclictest33-21ksoftirqd/200:32:042
3912994221,9cyclictest33-21ksoftirqd/220:55:192
3912994218,4cyclictest33-21ksoftirqd/222:56:002
3912994216,4cyclictest33-21ksoftirqd/219:15:132
256792420,1sleep10-21swapper/123:55:171
3912994137,2cyclictest33-21ksoftirqd/223:05:162
3912994136,3cyclictest33-21ksoftirqd/220:41:092
3912994117,3cyclictest33-21ksoftirqd/223:35:002
3912994117,3cyclictest33-21ksoftirqd/222:28:142
3912994117,3cyclictest33-21ksoftirqd/222:28:132
3912994116,3cyclictest33-21ksoftirqd/223:50:072
3912994115,7cyclictest33-21ksoftirqd/223:55:182
391399401,2cyclictest0-21swapper/322:05:063
3912994036,3cyclictest33-21ksoftirqd/223:25:072
3912994015,5cyclictest33-21ksoftirqd/219:27:502
3912994014,4cyclictest33-21ksoftirqd/219:55:152
3912994014,4cyclictest33-21ksoftirqd/219:55:152
3912994013,6cyclictest33-21ksoftirqd/200:20:002
391299396,3cyclictest33-21ksoftirqd/220:30:102
391299395,7cyclictest33-21ksoftirqd/200:05:152
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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