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2024-07-27 - 14:21

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #7, slot #4

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack7slot4s.osadl.org (updated Sat Jul 27, 2024 00:45:08)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
667399593,38cyclictest26306-21sh23:35:101
6665995620,8cyclictest131rcu_preempt22:35:130
668399521,35cyclictest8310-21ssh21:55:112
6665995237,8cyclictest0-21swapper/022:55:140
668399503,38cyclictest22146irq/40-dwc2_hso22:45:122
6692994818,18cyclictest25866irq/58-eth023:40:123
667399463,3cyclictest131rcu_preempt20:10:101
667399453,33cyclictest22709-21ssh21:45:101
666599457,23cyclictest12-21ksoftirqd/023:20:150
666599457,23cyclictest12-21ksoftirqd/023:20:140
6665994511,4cyclictest131rcu_preempt21:10:120
668399421,31cyclictest0-21swapper/221:40:122
668399410,17cyclictest22146irq/40-dwc2_hso20:10:122
6673994127,9cyclictest23685-21ssh00:10:151
667399401,27cyclictest2863-21ssh22:10:091
668399392,30cyclictest25762-21users22:20:312
669299381,19cyclictest25866irq/58-eth023:45:123
6673993823,12cyclictest21-21ksoftirqd/121:20:101
667399381,25cyclictest8222-21ssh00:20:101
666599371,33cyclictest6384-21sh22:30:120
668399362,15cyclictest8142-21ssh23:25:122
668399362,15cyclictest8142-21ssh23:25:112
6665993613,8cyclictest131rcu_preempt23:00:120
666599352,29cyclictest22518-21rm23:15:120
6692993425,5cyclictest25866irq/58-eth021:30:163
6692993416,12cyclictest25866irq/58-eth021:15:113
666599344,7cyclictest131rcu_preempt20:20:130
6683993314,14cyclictest131rcu_preempt22:35:132
6683993313,14cyclictest6377-21ssh22:30:122
6673993320,6cyclictest522-21usb-storage22:40:101
6665993317,13cyclictest12-21ksoftirqd/019:30:100
666599331,28cyclictest19212-21ssh21:25:120
668399327,20cyclictest22146irq/40-dwc2_hso22:40:112
668399323,18cyclictest22146irq/40-dwc2_hso20:30:122
666599322,25cyclictest12-21ksoftirqd/021:35:110
669299312,18cyclictest25866irq/58-eth022:20:113
668399314,17cyclictest22146irq/40-dwc2_hso21:15:132
668399312,22cyclictest0-21swapper/219:20:122
667399312,22cyclictest4528-21ssh23:05:131
666599313,23cyclictest28253-21ssh21:30:160
666599312,20cyclictest12-21ksoftirqd/019:20:120
666599311,28cyclictest24398-21ssh22:40:120
666599311,22cyclictest13784-21ssh21:40:120
669299304,17cyclictest0-21swapper/321:40:123
668399303,15cyclictest22146irq/40-dwc2_hso20:50:112
666599303,18cyclictest8241-21ssh00:20:110
6665993017,11cyclictest12-21ksoftirqd/020:50:120
668399295,14cyclictest22146irq/40-dwc2_hso19:30:112
668399291,19cyclictest0-21swapper/222:15:112
667399292,19cyclictest14964-21ssh00:05:111
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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