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2024-11-22 - 11:34
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rack7slot1.osadl.org (updated Fri Nov 22, 2024 00:45:47)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
27471211855,58sleep10-21swapper/119:06:001
27688211452,24sleep30-21swapper/319:08:423
27597211352,55sleep20-21swapper/219:07:332
2745929250,37sleep00-21swapper/019:05:500
169942580,1sleep015465-21stress22:26:320
27890994730,15cyclictest0-21swapper/023:56:070
27890994529,13cyclictest0-21swapper/021:36:090
27890994527,15cyclictest0-21swapper/023:10:220
27890994526,16cyclictest0-21swapper/023:27:460
27890994428,14cyclictest0-21swapper/022:20:010
27890994428,14cyclictest0-21swapper/022:20:010
27890994427,15cyclictest0-21swapper/023:35:590
27890994427,15cyclictest0-21swapper/023:35:580
27890994427,14cyclictest0-21swapper/021:42:070
27890994427,14cyclictest0-21swapper/021:42:070
27890994426,15cyclictest0-21swapper/000:38:020
27890994328,12cyclictest0-21swapper/022:10:260
27890994326,14cyclictest0-21swapper/021:49:550
27890994326,14cyclictest0-21swapper/021:49:550
27890994325,15cyclictest0-21swapper/022:20:170
27890994325,15cyclictest0-21swapper/022:20:160
27890994227,13cyclictest0-21swapper/022:35:290
27890994227,13cyclictest0-21swapper/021:26:050
27890994227,13cyclictest0-21swapper/021:11:000
27890994227,13cyclictest0-21swapper/021:11:000
27890994226,14cyclictest0-21swapper/023:40:140
27890994226,14cyclictest0-21swapper/022:55:150
27890994225,15cyclictest0-21swapper/022:50:240
27890994224,15cyclictest0-21swapper/023:05:170
27890994214,13cyclictest0-21swapper/000:30:150
2789099415,33cyclictest0-21swapper/000:05:020
2789099415,33cyclictest0-21swapper/000:05:020
27890994127,12cyclictest0-21swapper/022:07:320
27890994126,13cyclictest0-21swapper/021:20:190
27890994125,14cyclictest0-21swapper/022:30:210
27890994125,14cyclictest0-21swapper/021:50:190
27891994016,21cyclictest0-21swapper/123:12:081
27890994025,13cyclictest0-21swapper/023:03:200
27890994025,13cyclictest0-21swapper/023:03:200
27890994025,13cyclictest0-21swapper/021:16:550
27890994024,13cyclictest0-21swapper/000:25:190
27890994015,15cyclictest15465-21stress22:49:430
27890994015,14cyclictest15465-21stress23:34:230
27890994015,14cyclictest15465-21stress23:34:220
27890994012,15cyclictest15465-21stress23:50:100
27890994011,20cyclictest0-21swapper/020:45:180
46692395,13sleep30-21swapper/319:28:363
27890993924,12cyclictest0-21swapper/023:16:510
27890993923,14cyclictest0-21swapper/000:00:160
27890993915,11cyclictest11121-21cron21:00:000
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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