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2025-04-04 - 19:24
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100 highest latencies:
System rack7slot0.osadl.org (updated Fri Apr 04, 2025 12:43:50)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
117950660,0irq/26-eth1-rx-0-21swapper/107:07:281
110050610,0irq/25-eth00-21swapper/307:08:353
110050540,0irq/25-eth00-21swapper/207:07:502
2713124521,0sleep00-21swapper/007:07:370
27388991918,0cyclictest23198-21sshd10:30:102
2738899190,0cyclictest0-21swapper/209:11:442
27389991511,0cyclictest0-21swapper/312:03:033
2738999150,0cyclictest0-21swapper/312:29:043
2738999150,0cyclictest0-21swapper/307:15:013
27389991413,0cyclictest0-21swapper/309:53:103
27389991413,0cyclictest0-21swapper/309:29:363
27389991413,0cyclictest0-21swapper/309:21:353
2738999141,0cyclictest0-21swapper/311:50:313
2738999140,0cyclictest0-21swapper/307:45:113
27388991411,0cyclictest0-21swapper/212:33:142
27387991413,0cyclictest0-21swapper/110:09:091
27387991413,0cyclictest0-21swapper/109:40:421
27386991413,0cyclictest110050irq/25-eth012:33:130
2738699140,0cyclictest4736-21sshd12:21:570
2738699140,0cyclictest0-21swapper/011:10:360
2738699140,0cyclictest0-21swapper/009:30:070
27389991312,0cyclictest11674-21sshd12:22:403
27389991312,0cyclictest0-21swapper/312:07:563
27389991312,0cyclictest0-21swapper/309:15:393
2738999130,0cyclictest5166-21sshd09:12:243
2738999130,0cyclictest1326-21sshd09:44:223
2738999130,0cyclictest0-21swapper/310:29:123
27388991312,0cyclictest9261-21sshd09:59:182
27388991312,0cyclictest0-21swapper/210:21:502
27388991312,0cyclictest0-21swapper/209:36:532
27388991312,0cyclictest0-21swapper/209:22:362
27388991311,0cyclictest0-21swapper/211:40:162
27388991311,0cyclictest0-21swapper/210:18:142
2738899130,0cyclictest25416-21bash12:14:032
2738899130,0cyclictest19197-21sshd11:59:532
27387991312,0cyclictest22101-21sshd11:39:521
27387991312,0cyclictest0-21swapper/110:04:021
27387991312,0cyclictest0-21swapper/109:52:401
2738799130,0cyclictest0-21swapper/112:04:381
2738799130,0cyclictest0-21swapper/111:00:121
27386991312,0cyclictest0-21swapper/011:55:480
27386991312,0cyclictest0-21swapper/011:27:550
27386991311,0cyclictest0-21swapper/009:43:020
2738699130,0cyclictest13223-21sshd11:52:250
2738699130,0cyclictest0-21swapper/011:07:150
41120,0ktimersoftd/02870-21sshd12:28:360
41120,0ktimersoftd/00-21swapper/010:39:210
27389991212,0cyclictest0-21swapper/311:37:013
27389991211,0cyclictest5816-21sshd10:06:043
27389991211,0cyclictest0-21swapper/311:40:593
27389991210,0cyclictest0-21swapper/310:34:533
2738999120,0cyclictest0-21swapper/312:33:023
2738999120,0cyclictest0-21swapper/312:16:183
2738999120,0cyclictest0-21swapper/310:23:303
27388991211,0cyclictest670-21consoletype10:56:202
27388991211,0cyclictest3480-21sshd09:51:312
27388991211,0cyclictest18713-21bash12:26:502
27388991211,0cyclictest0-21swapper/211:09:352
27388991210,0cyclictest0-21swapper/211:15:242
2738899120,0cyclictest0-21swapper/210:25:272
2738799125,0cyclictest0-21swapper/112:32:201
27387991212,0cyclictest0-21swapper/110:17:531
27387991211,0cyclictest1438-21sshd12:38:251
27387991211,0cyclictest13185-21sshd10:21:281
27387991211,0cyclictest0-21swapper/112:22:301
27387991211,0cyclictest0-21swapper/110:43:471
27387991211,0cyclictest0-21swapper/109:46:581
27387991210,0cyclictest0-21swapper/112:07:461
27387991210,0cyclictest0-21swapper/110:46:121
27387991210,0cyclictest0-21swapper/109:15:431
2738799120,0cyclictest15201-21sshd11:11:391
2738799120,0cyclictest0-21swapper/110:55:021
27386991211,0cyclictest23915-21sshd09:50:130
27386991211,0cyclictest14664-21sshd09:35:140
27386991211,0cyclictest0-21swapper/010:41:280
27386991210,0cyclictest0-21swapper/012:04:230
27386991210,0cyclictest0-21swapper/011:30:220
27386991210,0cyclictest0-21swapper/010:13:410
2738699120,0cyclictest13274-21bash12:16:040
2738699120,0cyclictest0-21swapper/011:38:360
110050120,0irq/25-eth030311-21sshd11:47:320
110050120,0irq/25-eth00-21swapper/309:59:203
110050120,0irq/25-eth00-21swapper/111:30:081
110050120,0irq/25-eth00-21swapper/109:21:451
27389991111,0cyclictest0-21swapper/309:31:413
27389991111,0cyclictest0-21swapper/308:58:423
27389991110,0cyclictest20501-21sh08:05:163
27389991110,0cyclictest19387-21df_inode12:10:083
27389991110,0cyclictest18198-21irqstats10:40:163
27389991110,0cyclictest1285-21sshd10:01:553
27389991110,0cyclictest0-21swapper/311:20:533
27389991110,0cyclictest0-21swapper/310:49:103
2738999110,0cyclictest28383-21sshd11:06:213
27388991111,0cyclictest0-21swapper/209:45:502
27388991110,0cyclictest31621-21bash10:49:012
27388991110,0cyclictest29122-21sshd10:01:252
27388991110,0cyclictest2007-21sshd11:37:492
27388991110,0cyclictest0-21swapper/212:36:212
27388991110,0cyclictest0-21swapper/212:05:422
27388991110,0cyclictest0-21swapper/211:33:522
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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