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2024-11-22 - 10:33
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Characteristics of the 10 highest latencies:
System rack6slot6 (updated Fri Nov 22, 2024 00:43:50)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
124119910733853402,53841cyclictest21846-21ssh21:33:330
124119910710553446,53559cyclictest2935-21ssh23:23:450
124119910706053445,53527cyclictest3950irq/9-acpi22:00:210
124119910675053412,53272cyclictest0-21swapper20:57:130
124119910666153433,53228cyclictest0-21swapper22:52:560
124119910664153402,53148cyclictest0-21swapper23:25:050
124119910660053444,53156cyclictest0-21swapper23:58:450
124119910660053444,53156cyclictest0-21swapper20:29:450
124119910657053449,52998cyclictest18754-21ssh00:32:450
124119910651753478,53039cyclictest0-21swapper00:13:190
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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