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2024-11-22 - 11:35
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rack6slot0.osadl.org (updated Fri Nov 22, 2024 01:01:24)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
177799260255,3cyclictest0-21swapper/1922:22:4911
177799260255,3cyclictest0-21swapper/1922:22:4811
177799237209,12cyclictest9403-21inotify_reader00:15:1811
177799237209,12cyclictest9403-21inotify_reader00:15:1811
177799231211,5cyclictest0-21swapper/1920:55:1611
177799231211,5cyclictest0-21swapper/1920:55:1511
178399225214,9cyclictest0-21swapper/2521:44:2418
178399225214,9cyclictest0-21swapper/2521:44:2418
178399225214,9cyclictest0-21swapper/2521:44:2418
1768992215,199cyclictest0-21swapper/1321:55:165
1768992215,199cyclictest0-21swapper/1321:55:165
1768992215,199cyclictest0-21swapper/1321:55:165
17669921956,139cyclictest10337-21TaskSchedulerSi23:35:193
17669921956,139cyclictest10337-21TaskSchedulerSi23:35:183
175999216211,2cyclictest0-21swapper/522:25:1335
175999216211,2cyclictest0-21swapper/522:25:1335
1791992141,7cyclictest0-21swapper/3222:25:1826
1791992141,7cyclictest0-21swapper/3222:25:1826
176699213202,5cyclictest0-21swapper/1100:15:403
176699213202,5cyclictest0-21swapper/1100:15:403
177799207191,8cyclictest35724-21tune2fs19:25:1911
177799207191,8cyclictest35724-21tune2fs19:25:1911
178599205161,25cyclictest0-21swapper/2723:35:3920
178599205161,25cyclictest0-21swapper/2723:35:3920
176599200174,23cyclictest0-21swapper/1021:28:192
176599200174,23cyclictest0-21swapper/1021:28:192
177799196178,13cyclictest0-21swapper/1920:45:0511
177799196178,13cyclictest0-21swapper/1920:45:0511
17739919611,175cyclictest40941-21TaskSchedulerSi21:25:209
17739919611,175cyclictest40941-21TaskSchedulerSi21:25:209
178099195192,2cyclictest0-21swapper/2221:50:2215
178099195192,2cyclictest0-21swapper/2221:50:2215
177399195100,87cyclictest0-21swapper/1722:35:169
177399195100,87cyclictest0-21swapper/1722:35:169
177399195100,87cyclictest0-21swapper/1722:35:169
1773991932,78cyclictest19654-21inotify_reader22:40:199
1773991932,78cyclictest19654-21inotify_reader22:40:199
1773991932,78cyclictest19654-21inotify_reader22:40:199
177399193152,36cyclictest0-21swapper/1722:14:039
177399193152,36cyclictest0-21swapper/1722:14:039
177399193152,36cyclictest0-21swapper/1722:14:039
17669919234,44cyclictest30108-21NetworkChangeNo22:40:183
17669919234,44cyclictest30108-21NetworkChangeNo22:40:183
17669919234,44cyclictest30108-21NetworkChangeNo22:40:183
1765991911,182cyclictest0-21swapper/1023:35:212
1765991911,182cyclictest0-21swapper/1023:35:212
175899191183,6cyclictest0-21swapper/421:29:0734
175899191183,6cyclictest0-21swapper/421:29:0734
1768991901,3cyclictest0-21swapper/1321:30:235
1768991901,3cyclictest0-21swapper/1321:30:235
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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