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2025-04-02 - 05:45

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #5, slot #4

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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  Intel
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: ondemand
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack5slot4s.osadl.org (updated Wed Apr 02, 2025 00:44:40)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1751199137135,1cyclictest0-21swapper/219:10:032
1750299122113,8cyclictest0-21swapper/019:17:470
171732117103,10sleep20-21swapper/219:07:592
170302117104,9sleep30-21swapper/319:06:083
1750699111107,2cyclictest0-21swapper/119:10:031
12187210995,9sleep00-21swapper/019:05:120
17224210895,10sleep10-21swapper/119:08:391
17502996157,3cyclictest3316-21kworker/u16:0+events_unbound20:15:010
17502996157,3cyclictest10699-21kworker/u16:3+events_unbound21:05:260
17502995551,3cyclictest10699-21kworker/u16:3+events_unbound19:10:270
17502995349,3cyclictest10699-21kworker/u16:3+events_unbound19:55:260
17502995347,4cyclictest3316-21kworker/u16:0+events_unbound21:00:230
17502995248,3cyclictest9562-21kworker/u16:2+events_unbound23:55:150
17502995248,3cyclictest10699-21kworker/u16:3+events_unbound21:50:190
17502995147,3cyclictest3316-21kworker/u16:0+events_unbound19:40:270
17502995046,3cyclictest17596-21kworker/u16:3+events_unbound00:10:100
17502994945,3cyclictest9562-21kworker/u16:2+events_unbound23:50:210
17502994844,3cyclictest17596-21kworker/u16:3+events_unbound22:50:200
17502994844,3cyclictest17596-21kworker/u16:3+events_unbound22:40:260
17502994844,3cyclictest10699-21kworker/u16:3+events_unbound19:50:310
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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