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2025-04-02 - 08:22
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack4slot6.osadl.org (updated Wed Apr 02, 2025 00:44:32)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
7174521200,57pltrace0-21swapper/719:05:147
9959521110,102pltrace0-21swapper/219:09:462
717452950,91pltrace0-21swapper/319:05:193
995952900,76pltrace0-21swapper/519:10:005
153152890,1pltrace0-21swapper/323:11:153
995952870,82pltrace0-21swapper/619:08:126
990827460,10sleep10-21swapper/119:05:471
996825945,10sleep00-21swapper/019:06:180
993825743,10sleep40-21swapper/419:06:134
1041699240,23cyclictest0-21swapper/500:29:205
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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