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2024-11-22 - 17:15
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack4slot4.osadl.org (updated Fri Nov 22, 2024 12:51:43)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
71730rcu_preempt0-21swapper/209:39:522
71730rcu_preempt0-21swapper/209:39:522
71710rcu_preempt0-21swapper/010:04:250
71710rcu_preempt0-21swapper/010:04:250
71670rcu_preempt0-21swapper/212:40:042
71670rcu_preempt0-21swapper/212:40:042
71670rcu_preempt0-21swapper/211:54:102
71670rcu_preempt0-21swapper/211:54:102
71580rcu_preempt0-21swapper/211:19:142
71580rcu_preempt0-21swapper/211:19:142
71570rcu_preempt0-21swapper/210:16:292
71570rcu_preempt0-21swapper/210:16:292
71540rcu_preempt0-21swapper/111:14:071
71540rcu_preempt0-21swapper/111:14:071
46050520irq/122-QManpo11295-2109:24:360
46050520irq/122-QManpo11295-2109:24:360
71450rcu_preempt0-21swapper/212:51:072
71450rcu_preempt0-21swapper/212:51:072
46050430irq/122-QManpo10468-2109:24:360
46050430irq/122-QManpo10468-2109:24:360
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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