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2024-11-21 - 15:54
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack4slot4.osadl.org (updated Thu Nov 21, 2024 12:51:44)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
71750rcu_preempt0-21swapper/012:31:430
71750rcu_preempt0-21swapper/012:31:430
71710rcu_preempt0-21swapper/110:58:461
71710rcu_preempt0-21swapper/110:58:461
71660rcu_preempt0-21swapper/212:39:032
71660rcu_preempt0-21swapper/212:39:032
71630rcu_preempt0-21swapper/211:04:172
71630rcu_preempt0-21swapper/211:04:172
71630rcu_preempt0-21swapper/211:04:172
71590rcu_preempt0-21swapper/109:39:591
71590rcu_preempt0-21swapper/109:39:591
71590rcu_preempt0-21swapper/109:39:591
71570rcu_preempt9405-21apt-get08:30:573
71570rcu_preempt9405-21apt-get08:30:573
71530rcu_preempt0-21swapper/008:31:120
71530rcu_preempt0-21swapper/008:31:120
71510rcu_preempt0-21swapper/112:37:101
71510rcu_preempt0-21swapper/112:37:101
46050500irq/122-QManpo5545-2109:24:360
46050500irq/122-QManpo5545-2109:24:360
71460rcu_preempt0-21swapper/012:11:130
71460rcu_preempt0-21swapper/012:11:130
71450rcu_preempt0-21swapper/111:34:421
71450rcu_preempt0-21swapper/111:34:421
71430rcu_preempt0-21swapper/310:56:153
71430rcu_preempt0-21swapper/310:56:153
71430rcu_preempt0-21swapper/212:46:072
71430rcu_preempt0-21swapper/212:46:072
71430rcu_preempt0-21swapper/111:42:371
71430rcu_preempt0-21swapper/111:42:371
71430rcu_preempt0-21swapper/108:15:541
71430rcu_preempt0-21swapper/108:15:541
26045994316cyclictest8001-21/usr/sbin/munin08:26:083
26045994316cyclictest8001-21/usr/sbin/munin08:26:083
71420rcu_preempt29291-21copy11:50:572
71420rcu_preempt29291-21copy11:50:572
71420rcu_preempt21519-21copy10:30:501
71420rcu_preempt21519-21copy10:30:501
71420rcu_preempt1289-21copy10:55:510
71420rcu_preempt1289-21copy10:55:510
71420rcu_preempt0-21swapper/111:50:571
71420rcu_preempt0-21swapper/111:50:571
71420rcu_preempt0-21swapper/110:35:031
71420rcu_preempt0-21swapper/110:35:031
71420rcu_preempt0-21swapper/107:50:511
46450420irq/118-QManpo5819-2109:24:362
46450420irq/118-QManpo5819-2109:24:362
46250420irq/120-QManpo6520-2109:24:361
26045994221cyclictest14953-21/usr/sbin/munin08:51:143
26045994221cyclictest14953-21/usr/sbin/munin08:51:143
71410rcu_preempt7511-21kworker/2:312:19:082
71410rcu_preempt7511-21kworker/2:312:19:082
71410rcu_preempt0-21swapper/212:44:422
71410rcu_preempt0-21swapper/212:44:422
26045994122cyclictest469-21taskset07:56:143
26045994122cyclictest469-21taskset07:56:143
26045994121cyclictest2556-21cron13:00:453
26045994121cyclictest2556-21cron13:00:453
26045994120cyclictest31928-21grep09:41:143
26045994120cyclictest31928-21grep09:41:143
26045994117cyclictest11747-21seq11:16:103
26045994117cyclictest11747-21seq11:16:103
26045994116cyclictest63071ssh09:57:403
26045994116cyclictest63071ssh09:57:403
26045994115cyclictest21136-21ssh10:29:383
26045994115cyclictest21136-21ssh10:29:383
26045994115cyclictest15764-21ssh10:16:423
26045994115cyclictest15764-21ssh10:16:423
26045994114cyclictest18687-21ssh11:30:233
26045994114cyclictest18687-21ssh11:30:233
26045994114cyclictest18687-21ssh11:30:233
71400rcu_preempt31136-21sh12:53:001
71400rcu_preempt31136-21sh12:53:001
71400rcu_preempt30633-21ssh12:51:382
71400rcu_preempt30633-21ssh12:51:382
71400rcu_preempt29523-21diskstats07:46:030
71400rcu_preempt29523-21diskstats07:46:030
71400rcu_preempt0-21swapper/311:54:533
71400rcu_preempt0-21swapper/311:54:533
71400rcu_preempt0-21swapper/311:14:273
71400rcu_preempt0-21swapper/311:14:273
71400rcu_preempt0-21swapper/311:14:273
71400rcu_preempt0-21swapper/311:09:183
71400rcu_preempt0-21swapper/311:09:183
71400rcu_preempt0-21swapper/311:09:183
71400rcu_preempt0-21swapper/212:11:072
71400rcu_preempt0-21swapper/212:11:072
71400rcu_preempt0-21swapper/211:15:132
71400rcu_preempt0-21swapper/211:15:132
71400rcu_preempt0-21swapper/211:15:132
71400rcu_preempt0-21swapper/112:57:471
71400rcu_preempt0-21swapper/112:57:471
71400rcu_preempt0-21swapper/109:35:331
71400rcu_preempt0-21swapper/109:35:331
46250400irq/120-QManpo5826-2109:24:361
46050400irq/122-QManpo7473-210
46050400irq/122-QManpo7473-210
26045994022cyclictest12887-21snmpd10:00:583
26045994022cyclictest12887-21snmpd10:00:583
26045994020cyclictest20028-21ssh11:31:323
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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