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2024-11-22 - 11:41
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack3slot6.osadl.org (updated Fri Nov 22, 2024 00:45:02)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
311669913367,18cyclictest14-21ksoftirqd/022:10:140
311669913069,14cyclictest14-21ksoftirqd/020:00:170
311669912669,17cyclictest14-21ksoftirqd/020:35:100
311669912267,16cyclictest14-21ksoftirqd/000:15:130
311669911911,100cyclictest0-21swapper/023:40:140
311669911540,20cyclictest0-21swapper/021:25:150
311669911235,35cyclictest0-21swapper/021:10:120
311669911164,18cyclictest14-21ksoftirqd/020:20:120
311669911117,22cyclictest0-21swapper/023:50:100
311669910614,26cyclictest0-21swapper/021:35:090
311669910515,22cyclictest0-21swapper/000:35:110
311669910478,15cyclictest14-21ksoftirqd/022:15:110
311729910310,70cyclictest0-21swapper/122:15:141
311669910315,21cyclictest0-21swapper/000:30:170
311669910176,14cyclictest14-21ksoftirqd/022:20:120
311669910173,17cyclictest14-21ksoftirqd/019:45:150
3117299996,69cyclictest0-21swapper/100:25:121
3116699999,41cyclictest36-21kcompactd023:00:110
31166999969,18cyclictest14-21ksoftirqd/023:25:140
31166999967,21cyclictest14-21ksoftirqd/020:10:130
31166999966,18cyclictest14-21ksoftirqd/022:40:130
31166999913,41cyclictest0-21swapper/022:45:110
31166999870,17cyclictest14-21ksoftirqd/021:30:170
31166999869,18cyclictest14-21ksoftirqd/019:25:120
31166999868,19cyclictest14-21ksoftirqd/022:00:110
31166999868,19cyclictest14-21ksoftirqd/019:10:120
31166999867,20cyclictest14-21ksoftirqd/022:50:190
31166999866,21cyclictest14-21ksoftirqd/020:15:150
31166999866,17cyclictest14-21ksoftirqd/020:05:150
31166999864,19cyclictest14-21ksoftirqd/000:25:150
31166999774,14cyclictest14-21ksoftirqd/022:05:130
31166999773,12cyclictest14-21ksoftirqd/020:40:140
31166999768,19cyclictest14-21ksoftirqd/023:10:100
31166999666,18cyclictest14-21ksoftirqd/019:50:150
31166999666,17cyclictest14-21ksoftirqd/019:40:170
31166999665,19cyclictest14-21ksoftirqd/019:35:130
31166999663,21cyclictest14-21ksoftirqd/022:35:140
31166999567,15cyclictest14-21ksoftirqd/000:00:150
31166999565,18cyclictest14-21ksoftirqd/022:30:160
31166999565,18cyclictest14-21ksoftirqd/020:25:130
31166999467,17cyclictest14-21ksoftirqd/021:50:240
31166999465,19cyclictest14-21ksoftirqd/023:05:120
31166999463,19cyclictest14-21ksoftirqd/023:15:140
31166999362,20cyclictest14-21ksoftirqd/021:55:130
3117299928,64cyclictest0-21swapper/123:20:131
3117299927,62cyclictest0-21swapper/120:30:131
3117299927,20cyclictest0-21swapper/121:00:121
31166999214,70cyclictest0-21swapper/022:25:110
3117299907,19cyclictest0-21swapper/121:50:271
31166999060,18cyclictest14-21ksoftirqd/019:30:130
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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