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2024-11-22 - 10:48
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack3slot4.osadl.org (updated Fri Nov 22, 2024 00:46:46)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3824987233493321,9sleep13820549-21kworker/1:4+events@
dbs_work_handler
19:05:191
382646799162124,31cyclictest3948040-21kworker/u12:3+events_unbound@
flush_memcg_stats_dwork
22:23:130
382648099137123,7cyclictest3905726-21kworker/u12:1+events_unbound@
flush_memcg_stats_dwork
21:43:073
382646799135101,26cyclictest3852103-21kworker/u12:0+events_unbound@
flush_memcg_stats_dwork
20:17:490
382646799135101,26cyclictest3852103-21kworker/u12:0+events_unbound@
flush_memcg_stats_dwork
20:17:490
3826467991331,115cyclictest3937626-21ssh22:05:230
3826467991331,115cyclictest3937626-21ssh22:05:220
38264679912995,26cyclictest3898489-21kworker/u12:0+events_unbound@
flush_memcg_stats_dwork
21:48:070
38264679912591,26cyclictest3991742-21kworker/u12:0+events_unbound@
flush_memcg_stats_dwork
23:03:210
38264679912488,27cyclictest4074945-21kworker/u12:3+events_unbound@
flush_memcg_stats_dwork
00:06:560
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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