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2025-04-02 - 04:17
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack3slot3.osadl.org (updated Wed Apr 02, 2025 00:46:33)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
409210893sleep20-21swapper/219:08:104
33229884sleep00-21swapper/019:07:070
12250970irq/42-ahci0-21swapper/119:09:221
12250940irq/42-ahci0-21swapper/419:08:366
46829387sleep90-21swapper/919:08:1711
12250930irq/42-ahci0-21swapper/719:09:279
2963450890irq/53-eth0-rx-0-21swapper/519:05:497
60028381sleep30-21swapper/319:09:595
50127764sleep80-21swapper/819:08:4010
38326855sleep60-21swapper/619:07:518
2963450680irq/53-eth0-rx-0-21swapper/1119:05:533
3276725955sleep100-21swapper/1019:06:412
706994018cyclictest0-21swapper/020:08:290
74399373cyclictest0-21swapper/621:19:418
74699361cyclictest0-21swapper/922:24:4411
74599363cyclictest0-21swapper/819:38:0110
74599362cyclictest0-21swapper/821:17:3910
74699353cyclictest0-21swapper/920:12:2411
74599353cyclictest0-21swapper/820:46:0110
74599353cyclictest0-21swapper/819:43:3010
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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