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2025-04-04 - 05:53
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rack3slot1.osadl.org (updated Fri Apr 04, 2025 00:43:25)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1197999108102cyclictest3918-21tune2fs13:35:151
1197999104102cyclictest25609-21tune2fs14:25:161
1198199103102cyclictest0-21swapper/317:20:073
1198199103102cyclictest0-21swapper/316:20:093
1197999103102cyclictest24980-21tune2fs15:50:131
1197999103102cyclictest0-21swapper/116:10:211
11979999589cyclictest32139-21tune2fs14:40:171
11981999392cyclictest0-21swapper/318:00:023
11981999392cyclictest0-21swapper/315:50:133
11979998972cyclictest0-21swapper/116:05:121
11979998882cyclictest20934-21tune2fs17:10:121
11979998881cyclictest23470-21tune2fs13:05:201
11979998872cyclictest0-21swapper/115:40:111
11979998871cyclictest0-21swapper/112:45:171
11979998871cyclictest0-21swapper/112:45:171
11979998781cyclictest1819-21tune2fs14:45:141
11979998771cyclictest0-21swapper/114:05:231
11979998682cyclictest0-21swapper/117:39:521
11979998682cyclictest0-21swapper/115:59:561
11979998682cyclictest0-21swapper/115:10:221
11979998682cyclictest0-21swapper/112:55:211
11979998681cyclictest0-21swapper/118:00:021
11979998671cyclictest0-21swapper/116:40:071
11979998671cyclictest0-21swapper/116:00:131
11979998671cyclictest0-21swapper/115:20:161
11979998671cyclictest0-21swapper/114:39:591
11979998671cyclictest0-21swapper/114:20:001
11979998671cyclictest0-21swapper/114:15:001
11979998671cyclictest0-21swapper/113:00:231
11979998582cyclictest0-21swapper/116:59:541
11979998571cyclictest0-21swapper/113:10:241
11979998481cyclictest0-21swapper/117:00:111
11981998382cyclictest0-21swapper/317:45:123
11981998382cyclictest0-21swapper/317:44:523
11981998382cyclictest0-21swapper/317:44:523
11981998382cyclictest0-21swapper/316:50:093
11981998382cyclictest0-21swapper/316:25:173
11981998382cyclictest0-21swapper/316:10:153
11981998382cyclictest0-21swapper/316:00:133
11981998382cyclictest0-21swapper/315:34:573
11981998382cyclictest0-21swapper/315:29:573
11981998382cyclictest0-21swapper/314:40:253
11981998382cyclictest0-21swapper/314:35:183
11981998382cyclictest0-21swapper/314:05:233
11981998382cyclictest0-21swapper/313:55:233
11981998382cyclictest0-21swapper/313:45:223
11981998382cyclictest0-21swapper/313:35:153
11981998382cyclictest0-21swapper/313:25:163
11981998382cyclictest0-21swapper/313:20:263
11981998382cyclictest0-21swapper/313:10:243
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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