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2024-11-22 - 10:02
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack3slot0.osadl.org (updated Fri Nov 22, 2024 00:43:28)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
292972740,0sleep40-21swapper/423:02:474
961625241,8sleep20-21swapper/219:05:502
725725241,8sleep30-21swapper/319:02:303
945224925,8sleep70-21swapper/719:03:397
964024825,8sleep60-21swapper/619:06:106
775624628,13sleep40-21swapper/419:02:394
53782460,0sleep40-21swapper/423:55:334
165502460,0sleep20-21swapper/222:14:232
221022450,0sleep50-21swapper/500:35:385
47992440,0sleep00-21swapper/023:35:340
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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