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2024-11-22 - 10:10
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack2slot0.osadl.org (updated Fri Nov 22, 2024 00:43:48)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
60982960,0sleep06003-21sshd23:29:260
157402610,0sleep20-21swapper/223:08:102
318362570,1sleep231797-21sshd22:25:242
311992550,0sleep30-21swapper/323:19:123
174682550,0sleep30-21swapper/321:29:223
115472550,2sleep02409399cyclictest21:50:140
68472530,0sleep10-21swapper/123:04:031
270982530,0sleep30-21swapper/323:34:383
198992530,0sleep2311rcuc/223:11:412
153732530,0sleep30-21swapper/321:13:523
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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