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2024-07-16 - 08:27
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack1slot8.osadl.org (updated Tue Jul 16, 2024 00:43:56)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
154272951928,14sleep10-21swapper/119:05:541
1587199860790,62cyclictest0-21swapper/019:10:030
1587299853781,49cyclictest0-21swapper/119:10:041
1587199837748,66cyclictest0-21swapper/020:25:240
1587299814717,62cyclictest11461-21strings20:25:241
52602980,4sleep05264-21head00:15:200
290882850,4sleep029092-21cut19:45:220
227799780,3rtkit-daemon2276-21rtkit-daemon21:36:210
1587199772,60cyclictest26888-21diskmemload23:40:360
1587299752,66cyclictest21305-21latency_hist19:25:021
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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