You are here: Home / Projects / OSADL QA Farm Real-time / Latency plots / 
2024-11-22 - 17:15
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack1slot3.osadl.org (updated Fri Nov 22, 2024 12:43:47)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1626484991610,1cyclictest0-21swapper/310:35:103
1626484991313,0cyclictest0-21swapper/312:28:263
1626484991313,0cyclictest0-21swapper/312:18:133
1626484991313,0cyclictest0-21swapper/312:09:003
1626484991313,0cyclictest0-21swapper/311:17:483
1626484991313,0cyclictest0-21swapper/309:12:523
1626484991313,0cyclictest0-21swapper/308:52:223
1626484991313,0cyclictest0-21swapper/308:38:033
1626484991313,0cyclictest0-21swapper/307:30:283
1626484991312,0cyclictest0-21swapper/312:20:163
1626484991312,0cyclictest0-21swapper/309:39:293
1626484991312,0cyclictest0-21swapper/308:06:173
162648499130,11cyclictest0-21swapper/311:05:123
1626484991212,0cyclictest0-21swapper/311:30:043
1626484991212,0cyclictest0-21swapper/310:42:583
1626484991212,0cyclictest0-21swapper/310:22:303
1626484991212,0cyclictest0-21swapper/309:41:323
1626484991212,0cyclictest0-21swapper/309:34:213
1626484991212,0cyclictest0-21swapper/309:28:133
1626484991212,0cyclictest0-21swapper/309:01:363
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional