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2024-07-16 - 08:32
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack1slot3.osadl.org (updated Tue Jul 16, 2024 00:43:44)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
83611599120,11cyclictest0-21swapper/319:40:133
836115991111,0cyclictest0-21swapper/321:35:113
83611599110,11cyclictest0-21swapper/322:35:013
83611599110,10cyclictest0-21swapper/323:45:153
83611599110,0cyclictest0-21swapper/322:55:123
836115991010,0cyclictest0-21swapper/323:55:323
836115991010,0cyclictest0-21swapper/323:30:113
836115991010,0cyclictest0-21swapper/322:20:013
836115991010,0cyclictest0-21swapper/322:15:143
836115991010,0cyclictest0-21swapper/320:30:493
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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