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2024-11-22 - 17:04
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack1slot2.osadl.org (updated Fri Nov 22, 2024 12:43:23)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2147723930,0sleep20-21swapper/206:38:002
2159023829,0sleep30-21swapper/306:39:183
2148623727,0sleep10-21swapper/106:38:081
2149022824,0sleep00-21swapper/006:38:110
329970,0watchdog/30-21swapper/311:57:123
329970,0watchdog/30-21swapper/310:07:003
329970,0watchdog/30-21swapper/306:57:083
29925070,0irq/32-eth0-rx-0-21swapper/311:52:283
8315060,0irq/26-0000:00:26575-21awk12:11:512
8315060,0irq/26-0000:00:106202chrt09:51:512
339960,0migration/317281-21sh12:05:213
329960,0watchdog/323135-21ssh11:49:283
329960,0watchdog/30-21swapper/311:32:083
329960,0watchdog/30-21swapper/311:27:243
329960,0watchdog/30-21swapper/311:17:483
329960,0watchdog/30-21swapper/311:13:243
329960,0watchdog/30-21swapper/311:08:043
329960,0watchdog/30-21swapper/311:05:123
329960,0watchdog/30-21swapper/310:54:283
329960,0watchdog/30-21swapper/310:42:163
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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