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2024-07-16 - 08:27
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot8.osadl.org (updated Mon Jul 15, 2024 12:46:56)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
182333199462459,2cyclictest821irq_work/607:19:0712
182333199462459,2cyclictest821irq_work/607:19:0712
182333499460456,2cyclictest0-21swapper/807:19:0714
182333499460456,2cyclictest0-21swapper/807:19:0714
182332599426421,4cyclictest0-21swapper/007:19:070
182332599426421,4cyclictest0-21swapper/007:19:060
182334199332330,0cyclictest0-21swapper/1507:19:077
182334199332330,0cyclictest0-21swapper/1507:19:077
182332899332328,2cyclictest0-21swapper/307:19:079
182332899332328,2cyclictest0-21swapper/307:19:079
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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