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2024-07-16 - 08:18
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack0slot7.osadl.org (updated Tue Jul 16, 2024 00:44:45)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
27589672117115,1sleep130-21swapper/1319:09:595
7970201070,105pipewire0-21swapper/019:08:300
797020960,94pipewire0-21swapper/819:08:4414
797320830,81pipewire-pulse0-21swapper/519:06:3011
797020820,81pipewire0-21swapper/1219:06:574
797020770,76pipewire0-21swapper/1019:06:452
275882827730,45sleep140-21swapper/1419:08:406
797020760,74pipewire0-21swapper/619:05:1812
2759232997271,1cyclictest0-21swapper/023:05:470
275886626333,28sleep150-21swapper/1519:08:587
797020610,60pipewire0-21swapper/419:07:1910
2759275996159,1cyclictest2207214-1kworker/u33:223:39:233
275924399613,30cyclictest0-21swapper/323:05:489
2759289995757,0cyclictest0-21swapper/1521:23:387
2759232995453,1cyclictest0-21swapper/020:54:540
29379452530,1sleep12858316-21python20:02:391
2759262995351,2cyclictest21901-21IPC14
275883625229,1sleep30-21swapper/319:08:469
275928999500,8cyclictest0-21swapper/1519:46:497
275928999480,20cyclictest0-21swapper/1523:44:127
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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