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2024-11-22 - 10:47
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot6.osadl.org (updated Fri Nov 22, 2024 00:46:50)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3460249958978,511cyclictest0-21swapper/423:26:4210
3460449956941,528cyclictest0-21swapper/1021:55:212
3460249954214,527cyclictest0-21swapper/419:34:4310
3460249954214,527cyclictest0-21swapper/419:34:4310
3460249953537,497cyclictest0-21swapper/419:23:4310
3460639953435,497cyclictest0-21swapper/1523:09:217
3460279953436,1cyclictest0-21swapper/522:08:4411
3460129953233,498cyclictest0-21swapper/022:59:410
3460449953032,497cyclictest0-21swapper/1019:18:222
3460279953033,497cyclictest0-21swapper/523:29:2111
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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