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2024-11-25 - 06:06

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #0, slot #5

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack0slot5s.osadl.org (updated Mon Nov 25, 2024 00:46:29)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
8698642368361,5sleep100-21swapper/1019:08:102
8689212350343,5sleep20-21swapper/219:05:218
8699332347307,31sleep80-21swapper/819:09:1214
8698322347326,14sleep120-21swapper/1219:07:384
8697252346309,29sleep110-21swapper/1119:06:013
8699392342322,13sleep140-21swapper/1419:09:186
8699472341320,14sleep50-21swapper/519:09:2411
8697992341320,14sleep150-21swapper/1519:07:107
8698782340318,14sleep70-21swapper/719:08:2313
8698262340320,13sleep60-21swapper/619:07:3212
8698412339317,14sleep40-21swapper/419:07:4610
8697402339318,14sleep90-21swapper/919:06:1615
8697172339319,13sleep30-21swapper/319:05:539
8698382337318,12sleep10-21swapper/119:07:441
8697092337316,14sleep130-21swapper/1319:05:475
8697482333314,13sleep00-21swapper/019:06:230
87030999530,13cyclictest0-21swapper/1200:30:594
87030999448,11cyclictest0-21swapper/1222:52:094
87030999426,25cyclictest0-21swapper/1223:36:044
87030999380,25cyclictest0-21swapper/1222:19:114
87030999380,25cyclictest0-21swapper/1219:23:284
87030999380,25cyclictest0-21swapper/1219:23:274
87030999380,13cyclictest0-21swapper/1219:56:244
870316993737,0cyclictest0-21swapper/1520:13:197
87030999370,24cyclictest0-21swapper/1222:08:134
870300993737,0cyclictest0-21swapper/1000:16:082
87030499340,0cyclictest0-21swapper/1121:14:513
870300993433,1cyclictest0-21swapper/1023:06:232
870300993333,0cyclictest0-21swapper/1021:39:172
870295993331,1cyclictest1447-21snmpd20:48:0215
870287993332,1cyclictest0-21swapper/621:30:1412
87030999326,25cyclictest0-21swapper/1220:18:234
870309993232,0cyclictest0-21swapper/1200:36:064
870309993232,0cyclictest0-21swapper/1200:36:064
870291993215,14cyclictest0-21swapper/819:49:1214
87026899320,0cyclictest0-21swapper/022:43:440
87031499316,19cyclictest0-21swapper/1421:43:336
870314993131,0cyclictest0-21swapper/1421:50:336
87030999316,25cyclictest0-21swapper/1221:02:184
870309993110,3cyclictest0-21swapper/1219:29:044
870304993131,0cyclictest0-21swapper/1119:23:593
870304993131,0cyclictest0-21swapper/1119:23:593
87031699300,30cyclictest0-21swapper/1519:37:587
870314993030,0cyclictest0-21swapper/1400:05:436
870288993030,0cyclictest0-21swapper/719:44:5113
870288993030,0cyclictest0-21swapper/719:25:2013
87028799300,30cyclictest0-21swapper/619:21:3112
87028799300,30cyclictest0-21swapper/619:21:3112
87028399300,30cyclictest0-21swapper/520:39:5911
87027499304,26cyclictest0-21swapper/223:52:528
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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