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2024-11-25 - 15:20
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack0slot5.osadl.org (updated Mon Nov 25, 2024 00:43:36)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
63227499847412,434cyclictest0-21swapper/901:37:5715
63228099655653,2cyclictest562055-21kworker/11:1+i915-unordered00:23:583
63225099532531,1cyclictest0-21swapper/222:27:368
63226499506506,0cyclictest0-21swapper/620:36:0012
6322749950321,481cyclictest0-21swapper/922:10:3715
631901250343,445sleep50-21swapper/520:23:1311
63229399498498,0cyclictest567215-21kworker/15:1+i915-unordered23:00:007
632277994986,25cyclictest0-21swapper/1000:16:582
6322489949514,481cyclictest0-21swapper/122:56:371
63227499494493,1cyclictest828974-21kworker/9:2+i915-unordered00:31:3615
6322649949311,482cyclictest0-21swapper/620:44:3812
6322509949317,475cyclictest0-21swapper/201:15:138
63227799490489,1cyclictest0-21swapper/1001:21:132
6322879948914,475cyclictest0-21swapper/1301:29:365
63225899489489,0cyclictest0-21swapper/422:16:1310
632250994884,482cyclictest0-21swapper/221:51:598
6322809948711,475cyclictest0-21swapper/1101:49:093
63224899487486,1cyclictest0-21swapper/100:31:361
632248994873,483cyclictest0-21swapper/100:34:571
6322809948614,472cyclictest0-21swapper/1100:39:373
632244994863,483cyclictest0-21swapper/022:45:130
632287994852,0cyclictest0-21swapper/1301:53:135
6322809948524,460cyclictest0-21swapper/1123:27:383
6322809948514,468cyclictest0-21swapper/1122:15:593
6322809948511,473cyclictest0-21swapper/1101:02:573
6322509948518,0cyclictest0-21swapper/201:42:578
632290994841,482cyclictest0-21swapper/1421:10:136
6322809948410,473cyclictest0-21swapper/1101:12:363
632264994820,482cyclictest0-21swapper/623:48:3612
632264994820,482cyclictest0-21swapper/623:48:3612
6322879948110,470cyclictest0-21swapper/1300:02:355
63226099481481,0cyclictest774328-21kworker/5:1+i915-unordered01:02:1311
63226099481479,2cyclictest742594-21kworker/5:0+events22:40:5611
632244994810,480cyclictest0-21swapper/021:35:590
63225899480480,0cyclictest0-21swapper/423:37:5810
63225899480480,0cyclictest0-21swapper/423:37:5810
632285994790,27cyclictest0-21swapper/1200:26:354
6322809947923,454cyclictest0-21swapper/1122:28:133
63226099479478,1cyclictest0-21swapper/522:52:5911
632287994780,27cyclictest0-21swapper/1301:02:575
63228599478477,1cyclictest600549-21kworker/12:1+i915-unordered21:25:134
6322809947826,451cyclictest0-21swapper/1123:56:133
6322809947826,451cyclictest0-21swapper/1123:56:133
632258994780,29cyclictest0-21swapper/421:25:5910
63228799477476,1cyclictest869166-21kworker/13:0+i915-unordered01:25:365
6322809947726,451cyclictest0-21swapper/1122:03:583
6322809947726,451cyclictest0-21swapper/1100:28:133
6322809947724,452cyclictest0-21swapper/1121:19:383
6322809947724,451cyclictest0-21swapper/1123:00:383
63226099477477,0cyclictest0-21swapper/500:08:0011
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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