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2024-07-16 - 08:31
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot5.osadl.org (updated Tue Jul 16, 2024 00:43:36)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
266743399703302,400cyclictest0-21swapper/700:35:2013
266744499625625,0cyclictest0-21swapper/1101:17:193
266744499582553,1cyclictest0-21swapper/1100:17:433
266741099552552,0cyclictest0-21swapper/021:19:580
26674179954819,528cyclictest0-21swapper/201:22:438
266744499544544,0cyclictest0-21swapper/1123:30:423
266741799540540,0cyclictest0-21swapper/201:36:458
26674449953910,24cyclictest0-21swapper/1101:11:423
2667410995397,25cyclictest17-21ksoftirqd/020:58:580
26674299953125,504cyclictest0-21swapper/601:16:2212
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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