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2025-04-02 - 08:16
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot5.osadl.org (updated Tue Apr 01, 2025 00:43:45)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
392439199624624,0cyclictest0-21swapper/720:20:5813
392437899613613,0cyclictest0-21swapper/320:07:589
392437899613613,0cyclictest0-21swapper/320:07:589
392439199608608,0cyclictest0-21swapper/720:48:4213
392439199602602,0cyclictest0-21swapper/722:20:5813
39244059960037,44cyclictest0-21swapper/1019:44:422
392437199591296,294cyclictest0-21swapper/119:16:421
392441899589589,0cyclictest0-21swapper/1423:55:586
392439199587587,0cyclictest0-21swapper/700:38:4413
392439199585585,0cyclictest0-21swapper/721:46:2113
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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