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2024-11-22 - 10:29
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot5.osadl.org (updated Fri Nov 22, 2024 00:43:33)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
152596099655655,0cyclictest0-21swapper/522:06:0311
152595899526526,0cyclictest1513816-21kworker/4:2+i915-unordered20:53:0610
152598599523523,0cyclictest0-21swapper/1220:53:064
15259609952340,482cyclictest0-21swapper/522:30:4211
152595099522522,0cyclictest0-21swapper/220:42:068
15259689951616,500cyclictest0-21swapper/700:52:1813
15259609951644,472cyclictest69-21ksoftirqd/501:24:4211
152598599514514,0cyclictest1601060-21kworker/12:1+i915-unordered21:58:424
15259609951433,480cyclictest0-21swapper/500:28:0411
1525968995124,25cyclictest0-21swapper/720:25:0413
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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