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2024-07-16 - 08:20
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot4.osadl.org (updated Tue Jul 16, 2024 00:46:45)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
31518232422415,4sleep70-21swapper/719:09:4613
31515762372364,5sleep130-21swapper/1319:06:555
31482212372365,5sleep40-21swapper/419:05:0910
31517782363344,6sleep110-21swapper/1119:09:183
31518292357310,14sleep90-21swapper/919:09:4815
31516682357312,14sleep140-21swapper/1419:08:016
31517532354346,5sleep50-21swapper/519:08:5511
31516112347323,15sleep60-21swapper/619:07:2012
31517562345334,7sleep80-21swapper/819:08:5814
31517072344301,34sleep20-21swapper/219:08:208
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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