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2024-11-22 - 10:56
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack0slot3.osadl.org (updated Mon May 27, 2024 12:45:55)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
30841232379359,13sleep00-21swapper/007:09:000
30841332372367,3sleep80-21swapper/807:09:0814
30829322359353,4sleep110-21swapper/1107:05:263
30839482355313,14sleep150-21swapper/1507:06:347
30841112351345,4sleep50-21swapper/507:08:4911
30839582347325,15sleep70-21swapper/707:06:4213
30841392342322,13sleep140-21swapper/1407:09:146
30841542341321,14sleep100-21swapper/1007:09:262
30840772341321,14sleep90-21swapper/907:08:2215
30839922341320,14sleep40-21swapper/407:07:1310
30841642338329,6sleep30-21swapper/307:09:369
30840832337316,14sleep130-21swapper/1307:08:255
30839262335313,14sleep120-21swapper/1207:06:154
30841122333313,14sleep60-21swapper/607:08:5012
30840892330310,14sleep20-21swapper/207:08:318
30839322328308,13sleep10-21swapper/107:06:201
32580312540,0sleep80-21swapper/809:30:3614
34413682380,0sleep90-21swapper/911:23:5015
31116802350,0sleep10-21swapper/107:39:271
308442599340,9cyclictest0-21swapper/1411:26:426
308442599340,9cyclictest0-21swapper/1410:31:466
308442599340,9cyclictest0-21swapper/1409:14:546
308442599340,9cyclictest0-21swapper/1407:14:056
308442599330,8cyclictest0-21swapper/1410:42:456
308442599330,8cyclictest0-21swapper/1408:52:576
35053292320,0sleep30-21swapper/312:01:549
35042732320,0sleep130-21swapper/1312:00:445
32447402300,0sleep50-21swapper/509:24:4111
308442599305,0cyclictest0-21swapper/1411:48:406
33060872290,0sleep150-21swapper/1510:00:227
33060872290,0sleep150-21swapper/1510:00:227
308442599295,11cyclictest0-21swapper/1412:21:376
308442599295,11cyclictest0-21swapper/1407:58:026
308442599295,0cyclictest0-21swapper/1409:25:536
33127292280,0sleep70-21swapper/710:05:0313
308442599284,11cyclictest0-21swapper/1409:03:566
308442599284,11cyclictest0-21swapper/1408:09:006
31367972270,0sleep50-21swapper/508:10:1211
31203782270,0sleep100-21swapper/1007:50:012
308442599250,25cyclictest0-21swapper/1412:10:376
308442599250,25cyclictest0-21swapper/1411:59:386
308442599250,25cyclictest0-21swapper/1411:15:436
308442599250,25cyclictest0-21swapper/1411:15:436
308442599250,25cyclictest0-21swapper/1411:04:436
308442599250,25cyclictest0-21swapper/1410:53:456
308442599250,25cyclictest0-21swapper/1409:47:516
308442599250,25cyclictest0-21swapper/1409:36:516
308442599250,25cyclictest0-21swapper/1408:41:576
308442599250,25cyclictest0-21swapper/1408:30:586
308442599250,25cyclictest0-21swapper/1408:20:006
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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