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2024-11-22 - 10:45
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot2.osadl.org (updated Fri Nov 22, 2024 00:43:33)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
40111626250,6sleep70-21swapper/719:02:417
41057825040,7sleep50-21swapper/519:04:565
95521524946,1sleep70-21swapper/723:32:097
66962124846,1sleep70-21swapper/721:10:527
71121124644,1sleep70-21swapper/721:32:477
411040994644,2cyclictest587517-21kworker/u16:1+flush-8:020:57:546
49632224543,1sleep70-21swapper/719:44:407
97666923836,1sleep70-21swapper/723:46:357
41054023524,8sleep40-21swapper/419:04:234
411040992927,2cyclictest884490-21kworker/u16:5+events_unbound23:02:576
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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