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2025-04-02 - 08:11
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot2.osadl.org (updated Wed Apr 02, 2025 00:43:37)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
79322725747,7sleep60-21swapper/603:35:466
79345125343,7sleep50-21swapper/503:38:585
79324625320,29sleep70-21swapper/703:36:037
79329024939,7sleep40-21swapper/403:36:404
79378399390,37cyclictest944232-21latency_hist04:59:117
79378399350,33cyclictest643-21systemd-journal04:04:127
793776993230,2cyclictest1120768-21kworker/u16:1+events_unbound06:45:215
793771993230,2cyclictest1030046-21kworker/u16:5+flush-8:006:09:414
793776993129,2cyclictest1030046-21kworker/u16:5+events_unbound06:20:225
793771993129,2cyclictest1030046-21kworker/u16:5+events_unbound06:30:124
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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