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2024-07-16 - 08:38
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack0slot0.osadl.org (updated Tue Jul 16, 2024 00:45:24)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1276521170,0sleep50-21swapper/500:04:285
158402910,1sleep20-21swapper/222:04:502
287062860,0sleep00-21swapper/023:35:540
223292830,0sleep10-21swapper/121:15:441
223292830,0sleep10-21swapper/121:15:441
4682820,0sleep60-21swapper/623:36:166
194902820,0sleep10-21swapper/100:02:161
280142790,1sleep233-21ksoftirqd/221:27:152
235052790,1sleep3411ktimersoftd/323:54:323
214522790,0sleep00-21swapper/022:54:500
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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