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2024-10-20 - 05:17

Dates and Events:

OSADL Articles:

2024-10-02 12:00

Linux is now an RTOS!

PREEMPT_RT is mainline - What's next?


2023-11-12 12:00

Open Source License Obligations Checklists even better now

Import the checklists to other tools, create context diffs and merged lists


2023-03-01 12:00

Embedded Linux distributions

Results of the online "wish list"


2022-01-13 12:00

Phase #3 of OSADL project on OPC UA PubSub over TSN successfully completed

Another important milestone on the way to interoperable Open Source real-time Ethernet has been reached


2021-02-09 12:00

Open Source OPC UA PubSub over TSN project phase #3 launched

Letter of Intent with call for participation is now available



OSADL Projects

OSADL QA Farm on Real-time of Mainline Linux

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Number of cores/hyperthreads and bogoMIPS (x86 CPU strings, Intel names)

Box ↑ArchCoresMHzBogo​MIPSEffective
r0s0x86_​644 x 22,50040,00020.10. 01:10
r0s0sx86_​644 x 23,40054,39220.10. 01:10
r0s1x86_​644 x 22,30056,00020.10. 01:11
r0s1sx86_​644 x 23,30052,67220.10. 01:11
r0s2x86_​644 x 23,50055,87220.10. 01:11
r0s2sx86_​6410 x 13,70073,99020.10. 01:12
r0s3x86_​648 x 23,600115,20020.10. 01:13
r0s3sx86_​644 x 23,60067,20026.08. 01:14
r0s4x86_​648 x 23,600115,20020.10. 01:15
r0s4sx86_​648 x 23,600115,20020.10. 01:15
r0s5x86_​648 x 23,500115,20020.10. 01:16
r0s5sx86_​648 x 23,600115,20020.10. 01:17
r0s6x86_​648 x 23,600115,20020.10. 01:17
r0s6sx86_​6410 x 23,700147,98020.10. 01:18
r0s7x86_​648 x 23,600115,20020.10. 01:19
r0s7sx86_​642 x 23,70029,53226.08. 13:20
r0s8x86_​648 x 23,600115,20020.10. 01:20
r0s8sx86_​646 x 23,47083,37620.10. 01:21
r1s0x86_​644 x 13,10024,80020.10. 01:21
r1s1x86_​642 x 22,60021,69620.10. 01:22
r1s2x86_​644 x 12,30028,00020.10. 01:23
r1s2sx86_​644 x 12,30028,00020.10. 01:23
r1s3x86_​644 x 12,80022,42420.10. 01:24
r1s3sx86_​644 x 12,60020,88826.10. 13:42
r1s4arm​v7l2 x 11,2004820.10. 01:24
r1s4sarm​v7l2 x 14004820.10. 01:25
r1s5aarch​644 x 11,20079620.10. 01:26
r1s6x86_​642 x 22,13017,06420.10. 01:26
r1s6sx86_​642 x 21,66713,33220.10. 01:26
r1s7arm​v6l1 x 11,66753020.10. 01:27
r1s8i6861 x 21,6006,39820.10. 01:27
r1s8sx86_​644 x 11,90015,19620.10. 01:28
r2s0x86_​644 x 13,10024,80020.10. 01:28
r2s1arm​v5tejl1 x 120019920.10. 01:29
r2s2arm​v7l1 x 172049920.10. 01:29
r2s3arm​v7l0 x 1 x 162462420.10. 01:30
r2s3sarm​v7l0 x 1 x 16001,20020.10. 01:31
r2s4mips​641 x 180053124.12. 13:46
r2s5ppc1 x 13966620.10. 01:32
r2s5sarm​v7l4 x 11,20015220.10. 01:32
r2s6i6861 x 11,5002,99920.10. 01:33
r2s6saarch​644 x 11,3506420.10. 01:34
r2s7aarch​644 x 12,40043220.10. 01:34
r2s7saarch​644 x 11,50043220.10. 01:35
r2s8ppc1 x 14006620.10. 01:36
r3s0i6864 x 23,50055,99220.10. 01:37
r3s1i6864 x 12,40019,12720.10. 01:37
r3s2riscv641 x 11,00028420.10. 01:38
r3s2sriscv644 x 1028420.10. 01:39
r3s3x86_​646 x 23,33379,99220.10. 01:39
r3s4aarch​646 x 11,3009620.10. 01:40
r3s5i5861 x 113326520.10. 01:41
r3s5sppc2 x 11,20040020.10. 01:43
r3s6x86_​641 x 21,6606,66620.10. 01:43
r3s6sx86_​642 x 22,66721,33220.10. 01:44
r3s7i6861 x 15331,06620.10. 01:45
r3s8i6864 x 13,20027,37020.10. 01:46
r4s0x86_​642 x 22,30018,39620.10. 01:46
r4s1arm​v7l4 x 11,50072020.10. 01:47
r4s1sarm​v7l4 x 11,5001,00820.10. 01:47
r4s2arm​v7l1 x 180079619.10. 13:49
r4s2sarm​v7l1 x 180053020.10. 01:49
r4s3i5861 x 150099620.10. 01:51
r4s3si6861 x 11,4662,93228.07. 02:17
r4s4ppc4 x 11,20049820.10. 01:52
r4s5arm​v7l1 x 1500020.10. 01:55
r4s5saarch​644 x 11,60020020.10. 01:55
r4s6x86_​644 x 23,40054,25620.10. 01:56
r4s6sarm​v7l0 x 1 x 11,0006620.10. 01:57
r4s7i6864 x 11,83314,66420.10. 01:58
r4s7sx86_​642 x 11,8337,33220.10. 01:59
r4s8arm​v7l1 x 140039820.10. 02:00
r4s8sarm​v7l1 x 140039820.10. 02:00
r5s0x86_​642 x 22,20017,58220.10. 02:01
r5s1x86_​646 x 13,33340,09220.10. 02:01
r5s2x86_​644 x 12,70021,69920.10. 02:02
r5s2sx86_​644 x 24,00063,86312.04. 01:34
r5s3x86_​644 x 22,00031,87220.10. 02:02
r5s3sx86_​644 x 11,60012,74820.10. 02:03
r5s4x86_​642 x 22,53020,26420.10. 02:04
r5s4sx86_​642 x 22,53020,26420.10. 02:04
r5s5arm​v7l1 x 160059720.10. 02:06
r5s5sarm​v7l1 x 160060020.10. 02:08
r5s6ppc1 x 153313320.10. 02:11
r5s7arm​v7l1 x 15286420.10. 02:12
r5s7sarm​v7l1 x 15284820.10. 02:13
r5s8x86_​644 x 12,00015,97220.10. 02:15
r6s0x86_​642 x 10 x 21,700136,18020.10. 02:16
r6s1x86_​642 x 12,0007,97820.10. 02:16
r6s2x86_​642 x 11,6679,57820.10. 02:16
r6s3x86_​644 x 22,20035,12020.10. 02:17
r6s4x86_​642 x 11,1004,37620.10. 02:18
r6s5i6861 x 11,5002,24420.10. 02:40
r6s6i6861 x 11,6003,19220.10. 02:42
r6s7i6862 x 12,3009,17620.10. 02:43
r6s8x86_​642 x 22,30018,35620.10. 02:43
r7s0x86_​642 x 22,30018,40020.10. 02:44
r7s1x86_​644 x 11,60012,84020.10. 02:44
r7s2aarch​642 x 11,7009620.10. 02:45
r7s2sarm​v7l4 x 11,50072013.07. 02:16
r7s3arm​v6l1 x 1700520.10. 02:46
r7s3sarm​v7l4 x 11,40035620.10. 02:47
r7s4arm​v7l1 x 153634820.10. 02:48
r7s4sarm​v7l4 x 11,5001,08020.10. 02:49
r7s5i6861 x 11,3002,59320.10. 02:49
r7s6arm​v7l1 x 11,00039828.02. 14:10
r7s7x86_​644 x 11,60012,76720.10. 02:50
r7s7sx86_​642 x 22,30018,39620.10. 02:51
r7s8arm​v7l1 x 11,00099520.10. 02:51
r7s8sarm​v7l1 x 11,00099620.10. 02:52
r8s0x86_​642 x 22,30018,40020.10. 02:52
r8s1i5861 x 135070120.10. 02:53
r8s2x86_​642 x 22,10016,76020.10. 02:54
r8s2sx86_​642 x 22,10016,76020.10. 02:54
r8s3x86_​644 x 12,66721,28020.10. 02:55
r8s4x86_​644 x 21,60028,80020.10. 02:56
r8s4sx86_​644 x 21,60028,80020.10. 02:56
r8s5i6864 x 23,40054,40020.10. 02:57
r8s6arm​v7l1 x 150049820.10. 02:57
r8s6sx86_​644 x 13,30026,41620.10. 02:57
r8s7x86_​644 x 13,20025,49620.10. 02:58
r8s7sx86_​642 x 13,00011,98020.10. 02:59
r8s8x86_​642 x 11,3005,14420.10. 02:59
r9s0x86_​642 x 22,30018,39620.10. 03:00
r9s1x86_​642 x 12,0003,99220.10. 03:01
r9s1sarm​v7l1 x 101,25014.04. 18:03
r9s2x86_​644 x 11,60012,74820.10. 03:01
r9s2sx86_​644 x 11,60012,74830.08. 17:02
r9s3x86_​644 x 11,60012,74820.10. 03:02
r9s3sx86_​644 x 13,00024,00020.10. 03:02
r9s4i6861 x 21,0003,99020.10. 03:03
r9s4sx86_​642 x 11,3335,34720.10. 03:08
r9s5x86_​642 x 12,70010,77413.07. 03:15
r9s5sx86_​642 x 13,30013,19820.10. 03:08
r9s6x86_​642 x 23,00023,94420.10. 03:09
r9s7arm​v7l2 x 11,000020.10. 03:10
r9s8sarm​v7l1 x 180079620.10. 03:11
ras0x86_​642 x 22,30018,41720.10. 03:11
ras1i6861 x 11,4002,79920.10. 03:12
ras2x86_​642 x 11,0674,26620.10. 03:12
ras2sx86_​644 x 11,90015,05220.10. 03:13
ras3aarch​648 x 12,0004,00020.10. 03:13
ras3sarm​v7l1 x 11,30084020.10. 03:13
ras4arm​v7l1 x 150039820.10. 03:14
ras4sarm​v7l1 x 160059707.02. 02:45
ras5arm​v7l2 x 11,0002420.10. 03:14
ras5sarm​v7l2 x 11,0002420.10. 03:15
ras6aarch​648 x 12,0003,20020.10. 03:15
ras6sarm​v7l1 x 11,0001,98720.10. 03:16
ras7ppc1 x 13966520.10. 03:17
ras8x86_​644 x 11,60014,40020.10. 03:17
ras8sx86_​644 x 11,60012,74820.10. 03:18
rbs0i6862 x 22,50017,60020.10. 03:18
rbs1x86_​644 x 12,00015,97220.10. 03:19
rbs2x86_​644 x 12,00015,97220.10. 03:19
rbs2sx86_​641 x 13,500007.09. 15:06
rbs3arm​v7l4 x 19962420.10. 03:20
rbs3sarm​v7l4 x 11,40035620.10. 03:21
rbs4x86_​644 x 11,2009,60020.10. 03:21
rbs4sx86_​644 x 11,60012,74820.10. 03:22
rbs5i6864 x 2049,41520.10. 03:22
rbs5saarch​644 x 11,6006420.10. 03:23
rbs6x86_​644 x 11,91515,32420.10. 03:23
rbs6sx86_​642 x 11,3335,33229.08. 03:00
rbs7arm​v7l4 x 19961220.10. 03:24
rbs7sarm​v7l4 x 19962420.10. 03:25
rbs8arm​v7l2 x 16662,65020.10. 03:26
rbs8sx86_​644 x 22,40038,70420.10. 03:26
rcs0x86_​648 x 22,40076,60020.10. 03:28
rcs1x86_​646 x 23,46783,37620.10. 03:29
rcs2x86_​642 x 12,80011,23220.10. 03:29
rcs3i6862 x 11,4005,58620.10. 03:30
rcs3sx86_​644 x 13,30026,39620.10. 03:31
rcs4x86_​642 x 11,1004,37620.10. 03:31
rcs4sx86_​644 x 11,1008,75216.09. 03:07
rcs5x86_​642 x 12,80011,19820.10. 03:33
rcs5sx86_​642 x 12,80011,19820.10. 03:35
rcs6x86_​644 x 23,50063,99220.10. 03:35
rcs7x86_​642 x 21,80014,40020.10. 03:36
rcs7sx86_​644 x 11,50011,98020.10. 03:37
rcs8x86_​6416 x 23,700217,15220.10. 03:41
rcs8sx86_​644 x 23,30052,80020.10. 03:41
rds0x86_​644 x 21,80031,99220.10. 03:42
rds1x86_​644 x 11,91015,32420.10. 03:42
rds2x86_​644 x 11,91015,32423.09. 03:21
rds3x86_​644 x 11,91015,32423.09. 03:22
rds4x86_​644 x 11,91015,32420.10. 03:43
rds5x86_​644 x 11,60012,74820.10. 03:44
rds6x86_​644 x 11,60012,74820.10. 03:44
rds7x86_​644 x 11,60012,74820.10. 03:45
rds8x86_​644 x 11,60012,74820.10. 03:46
res0x86_​644 x 23,40054,39220.10. 03:46
res1x86_​644 x 11,60014,40020.10. 03:47
res1sx86_​644 x 11,60014,40020.10. 03:47
res2x86_​644 x 11,60014,40020.10. 03:47
res3x86_​644 x 12,00015,97220.10. 03:48
res3saarch​640 x 1 x 11,0001,60020.10. 03:49
res4x86_​644 x 11,90015,05220.10. 03:49
res4sx86_​644 x 11,90015,05220.10. 03:50
res5x86_​642 x 22,20019,20020.10. 03:51
res5sx86_​642 x 22,20019,20020.10. 03:51
res6x86_​644 x 11,1008,75220.10. 03:52
res6saarch​644 x 101,60020.10. 03:53
res7arm​v7l0 x 1 x 11,0001220.10. 03:53
res7sarm​v7l0 x 1 x 11,0001220.10. 03:54
res8x86_​644 x 11,90015,05220.10. 03:54
res8sx86_​644 x 11,90015,05220.10. 03:55
rfs0x86_​6416 x 22,000127,96820.10. 03:56
rfs1aarch​644 x 11,50043220.10. 03:57
rfs2aarch​644 x 11,50043220.10. 03:57
rfs3x86_​644 x 11,60012,74820.10. 03:57
rfs3sx86_​644 x 11,60012,74820.10. 03:58
rfs4arm​v7l1 x 180080020.10. 03:59
rfs4sarm​v7l1 x 180080020.10. 04:00
rfs6arm​v7l1 x 16671,33220.10. 04:01
rfs6sarm​v7l1 x 16671,33220.10. 04:02
rfs7x86_​644 x 22,60041,60020.10. 04:02
rfs7sx86_​644 x 17006,44820.10. 04:03
rfs8arm​v7l1 x 11,00012020.10. 04:04
 

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