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2024-09-29 - 01:11
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OSADL QA Farm on Real-time of Mainline Linux

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Number of cores/hyperthreads and bogoMIPS (x86 CPU strings, Intel names)

Box ↑ArchCoresMHzBogo​MIPSEffective
r0s0x86_​644 x 22,50040,00029.09. 01:10
r0s0sx86_​644 x 23,40054,39229.09. 01:11
r0s1x86_​644 x 22,30056,00029.09. 01:11
r0s1sx86_​644 x 23,30052,67228.09. 13:11
r0s2x86_​644 x 23,50055,86428.09. 13:11
r0s2sx86_​6410 x 13,70073,99028.09. 13:12
r0s3x86_​648 x 23,600115,20028.09. 13:13
r0s3sx86_​644 x 23,60067,20026.08. 01:14
r0s4x86_​648 x 23,600115,20028.09. 13:15
r0s4sx86_​648 x 23,600115,20028.09. 13:16
r0s5x86_​648 x 23,500115,20028.09. 13:16
r0s5sx86_​648 x 23,600115,20028.09. 13:17
r0s6x86_​648 x 23,600115,20028.09. 13:20
r0s6sx86_​6410 x 23,700147,98028.09. 13:21
r0s7x86_​648 x 23,600115,20028.09. 13:22
r0s7sx86_​642 x 23,70029,53226.08. 13:20
r0s8x86_​648 x 23,600115,20028.09. 13:22
r0s8sx86_​646 x 23,47083,37628.09. 13:24
r1s0x86_​644 x 13,10024,80028.09. 13:24
r1s1x86_​642 x 22,60021,69628.09. 13:25
r1s2x86_​644 x 12,30028,00028.09. 13:25
r1s2sx86_​644 x 12,30028,00028.09. 13:26
r1s3x86_​644 x 12,80022,42428.09. 13:26
r1s3sx86_​644 x 12,60020,88826.10. 13:42
r1s4arm​v7l2 x 11,2004828.09. 13:27
r1s4sarm​v7l2 x 14004828.09. 13:28
r1s5aarch​644 x 11,20079628.09. 13:28
r1s6x86_​642 x 22,13017,06428.09. 13:28
r1s6sx86_​642 x 21,66713,33228.09. 13:29
r1s7arm​v6l1 x 11,66753028.09. 13:30
r1s8i6861 x 21,6006,39828.09. 13:30
r1s8sx86_​644 x 11,90015,19628.09. 13:31
r2s0x86_​644 x 13,10024,80028.09. 13:31
r2s1arm​v5tejl1 x 120019928.09. 13:32
r2s2arm​v7l1 x 172049928.09. 13:32
r2s3arm​v7l0 x 1 x 162462428.09. 13:32
r2s3sarm​v7l0 x 1 x 16001,20028.09. 13:33
r2s4mips​641 x 180053124.12. 13:46
r2s5ppc1 x 13966628.09. 13:34
r2s6i6861 x 11,5002,99928.09. 13:34
r2s6saarch​644 x 11,3506428.09. 13:35
r2s7aarch​644 x 12,40043228.09. 13:35
r2s7saarch​644 x 11,50043228.09. 13:36
r2s8ppc1 x 14006628.09. 13:37
r3s0i6864 x 23,50055,99228.09. 13:38
r3s1i6864 x 12,40019,12728.09. 13:38
r3s2riscv641 x 11,00028428.09. 13:39
r3s2sriscv644 x 1028428.09. 13:40
r3s3x86_​646 x 23,33379,99228.09. 13:41
r3s4aarch​646 x 11,3009628.09. 13:42
r3s5i5861 x 113326528.09. 13:42
r3s5sppc2 x 11,20040028.09. 13:44
r3s6x86_​641 x 21,6606,66628.09. 13:45
r3s6sx86_​642 x 22,66721,33228.09. 13:45
r3s7i6861 x 15331,06628.09. 13:46
r3s8i6864 x 13,20027,37028.09. 13:47
r4s0x86_​642 x 22,30018,39628.09. 13:47
r4s1arm​v7l4 x 11,50079228.09. 13:48
r4s1sarm​v7l4 x 11,50093628.09. 13:48
r4s2arm​v7l1 x 180079628.09. 13:50
r4s2sarm​v7l1 x 180053028.09. 13:51
r4s3i5861 x 150099628.09. 13:53
r4s3si6861 x 11,4662,93228.07. 02:17
r4s4ppc4 x 11,20049828.09. 13:54
r4s5arm​v7l1 x 1500028.09. 13:57
r4s5saarch​644 x 11,60020028.09. 13:57
r4s6x86_​644 x 23,40054,25628.09. 13:57
r4s6sarm​v7l0 x 1 x 11,0006628.09. 13:59
r4s7i6864 x 11,83314,66428.09. 14:00
r4s7sx86_​642 x 11,8337,33228.09. 14:00
r4s8arm​v7l1 x 140039828.09. 14:01
r4s8sarm​v7l1 x 140039828.09. 14:01
r5s0x86_​642 x 22,20017,58228.09. 14:02
r5s1x86_​646 x 13,33340,09228.09. 14:02
r5s2x86_​644 x 12,70021,69928.09. 14:03
r5s2sx86_​644 x 24,00063,86312.04. 01:34
r5s3x86_​644 x 22,00031,87228.09. 14:04
r5s3sx86_​644 x 11,60012,74828.09. 14:04
r5s4x86_​642 x 22,53020,26428.09. 14:05
r5s4sx86_​642 x 22,53020,26428.09. 14:06
r5s5arm​v7l1 x 160059728.09. 14:07
r5s5sarm​v7l1 x 160060027.09. 14:13
r5s6ppc1 x 153313328.09. 14:09
r5s7arm​v7l1 x 15286428.09. 14:09
r5s7sarm​v7l1 x 15286428.09. 14:11
r5s8x86_​644 x 12,00015,97228.09. 14:12
r6s0x86_​642 x 10 x 21,700136,18028.09. 14:12
r6s1x86_​642 x 12,0007,97828.09. 14:13
r6s2x86_​642 x 11,6679,57828.09. 14:14
r6s3x86_​644 x 22,20035,12028.09. 14:14
r6s4x86_​642 x 11,1004,37628.09. 14:15
r6s5i6861 x 11,5002,99228.09. 14:15
r6s6i6861 x 11,6003,19228.09. 14:16
r6s7i6862 x 12,3009,17628.09. 14:17
r6s8x86_​642 x 22,30018,35628.09. 14:17
r7s0x86_​642 x 22,30018,40028.09. 14:18
r7s1x86_​644 x 11,60012,84028.09. 14:18
r7s2aarch​642 x 11,7009628.09. 14:18
r7s2sarm​v7l4 x 11,50072013.07. 02:16
r7s3arm​v6l1 x 1700528.09. 14:19
r7s3sarm​v7l4 x 11,40035628.09. 14:22
r7s4arm​v7l1 x 153634828.09. 14:23
r7s4sarm​v7l4 x 11,5001,08028.09. 14:24
r7s5i6861 x 11,3002,59328.09. 14:24
r7s6arm​v7l1 x 11,00039828.02. 14:10
r7s7x86_​644 x 11,60012,76728.09. 14:25
r7s7sx86_​642 x 22,30018,39628.09. 14:26
r7s8arm​v7l1 x 11,00099528.09. 14:26
r7s8sarm​v7l1 x 11,00079628.09. 14:27
r8s0x86_​642 x 22,30018,40028.09. 14:28
r8s1i5861 x 135070128.09. 14:28
r8s2x86_​642 x 22,10016,76028.09. 14:29
r8s2sx86_​642 x 22,10016,76028.09. 14:30
r8s3x86_​644 x 12,66721,28028.09. 14:31
r8s4x86_​644 x 21,60028,80028.09. 14:31
r8s4sx86_​644 x 21,60028,80028.09. 14:32
r8s5i6864 x 23,40054,40028.09. 14:32
r8s6arm​v7l1 x 150049828.09. 14:32
r8s6sx86_​644 x 13,30026,41628.09. 14:33
r8s7x86_​644 x 13,20025,49628.09. 14:33
r8s7sx86_​642 x 13,00011,98028.09. 14:34
r8s8x86_​642 x 11,3005,14428.09. 14:34
r9s0x86_​642 x 22,30018,39628.09. 14:35
r9s1x86_​642 x 12,0003,99228.09. 14:36
r9s1sarm​v7l1 x 101,25014.04. 18:03
r9s2x86_​644 x 11,60012,74828.09. 14:36
r9s2sx86_​644 x 11,60012,74830.08. 17:02
r9s3x86_​644 x 11,60012,74828.09. 14:37
r9s3sx86_​644 x 13,00024,00028.09. 14:37
r9s4i6861 x 21,0003,99028.09. 14:38
r9s4sx86_​642 x 11,3335,34728.09. 14:43
r9s5x86_​642 x 12,70010,77413.07. 03:15
r9s5sx86_​642 x 13,30013,19828.09. 14:44
r9s6x86_​642 x 23,00023,94428.09. 14:44
r9s7arm​v7l2 x 11,000028.09. 14:45
r9s8sarm​v7l1 x 180079628.09. 14:46
ras0x86_​642 x 22,30018,41728.09. 14:46
ras1i6861 x 11,4002,79928.09. 14:47
ras2x86_​642 x 11,0674,26628.09. 14:47
ras2sx86_​644 x 11,90015,05228.09. 14:47
ras3aarch​648 x 12,0004,00028.09. 14:48
ras3sarm​v7l1 x 11,30084028.09. 14:48
ras4arm​v7l1 x 150039828.09. 14:49
ras4sarm​v7l1 x 160059707.02. 02:45
ras5arm​v7l2 x 11,0002428.09. 14:49
ras5sarm​v7l2 x 11,0002428.09. 14:50
ras6aarch​648 x 12,0003,20028.09. 14:50
ras6sarm​v7l1 x 11,0001,98728.09. 14:51
ras7ppc1 x 13966528.09. 14:51
ras8x86_​644 x 11,60014,40028.09. 14:52
ras8sx86_​644 x 11,60012,74828.09. 14:52
rbs0i6862 x 22,50017,60028.09. 14:53
rbs1x86_​644 x 12,00015,97228.09. 14:54
rbs2x86_​644 x 12,00015,97228.09. 14:54
rbs2sx86_​641 x 13,500007.09. 15:06
rbs3arm​v7l4 x 19962828.09. 14:55
rbs3sarm​v7l4 x 11,40035628.09. 14:55
rbs4x86_​644 x 11,2009,60028.09. 14:56
rbs4sx86_​644 x 11,60012,74828.09. 14:57
rbs5i6864 x 2049,53928.09. 14:57
rbs5saarch​644 x 11,6006428.09. 14:57
rbs6x86_​644 x 11,91515,32428.09. 14:58
rbs6sx86_​642 x 11,3335,33229.08. 03:00
rbs7arm​v7l4 x 19961228.09. 14:59
rbs7sarm​v7l4 x 19962428.09. 15:00
rbs8arm​v7l2 x 16662,65028.09. 15:01
rbs8sx86_​644 x 22,40038,70428.09. 15:01
rcs0x86_​648 x 22,40076,60028.09. 15:02
rcs1x86_​646 x 23,46783,37628.09. 15:03
rcs2x86_​642 x 12,80011,23228.09. 15:04
rcs3i6862 x 11,4005,58628.09. 15:05
rcs3sx86_​644 x 13,30026,39628.09. 15:05
rcs4x86_​642 x 11,1004,37628.09. 15:06
rcs4sx86_​644 x 11,1008,75216.09. 03:07
rcs5x86_​642 x 12,80011,19828.09. 15:08
rcs5sx86_​642 x 12,80011,19828.09. 15:09
rcs6x86_​644 x 23,50063,99228.09. 15:09
rcs7x86_​642 x 21,80014,40028.09. 15:10
rcs7sx86_​644 x 11,50011,98028.09. 15:11
rcs8x86_​6416 x 23,700217,15228.09. 15:15
rcs8sx86_​644 x 23,30052,80028.09. 15:15
rds0x86_​644 x 21,80031,99228.09. 15:16
rds1x86_​644 x 11,91015,32428.09. 15:17
rds2x86_​644 x 11,91015,32423.09. 03:21
rds3x86_​644 x 11,91015,32423.09. 03:22
rds4x86_​644 x 11,91015,32428.09. 15:17
rds5x86_​644 x 11,60012,74828.09. 15:18
rds6x86_​644 x 11,60012,74828.09. 15:18
rds7x86_​644 x 11,60012,74828.09. 15:19
rds8x86_​644 x 11,60012,74828.09. 15:19
res0x86_​644 x 23,40054,39228.09. 15:20
res1x86_​644 x 11,60014,40028.09. 15:21
res1sx86_​644 x 11,60014,40028.09. 15:21
res2x86_​644 x 11,60014,40028.09. 15:21
res3x86_​644 x 12,00015,97228.09. 15:22
res3saarch​640 x 1 x 11,0001,60028.09. 15:22
res4x86_​644 x 11,90015,05228.09. 15:23
res4sx86_​644 x 11,90015,05228.09. 15:23
res5x86_​642 x 22,20019,20028.09. 15:24
res5sx86_​642 x 22,20019,20028.09. 15:24
res6x86_​644 x 11,1008,75228.09. 15:25
res6saarch​644 x 101,60028.09. 15:26
res7arm​v7l0 x 1 x 11,0001228.09. 15:27
res7sarm​v7l0 x 1 x 11,0001228.09. 15:27
res8x86_​644 x 11,90015,05228.09. 15:28
res8sx86_​644 x 11,90015,05228.09. 15:28
rfs0x86_​6416 x 22,000127,96828.09. 15:29
rfs1aarch​644 x 11,50043228.09. 15:29
rfs2aarch​644 x 11,50043228.09. 15:30
rfs3x86_​644 x 11,60012,74828.09. 15:30
rfs3sx86_​644 x 11,60012,74828.09. 15:30
rfs4arm​v7l1 x 180080028.09. 15:31
rfs4sarm​v7l1 x 180080028.09. 15:32
rfs6arm​v7l1 x 16671,33228.09. 15:33
rfs6sarm​v7l1 x 16671,33228.09. 15:33
rfs7x86_​644 x 22,60041,60028.09. 15:34
rfs7sx86_​644 x 17006,44828.09. 15:35
rfs8arm​v7l1 x 11,00012023.09. 03:41
 

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