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2024-11-22 - 07:27

Dates and Events:

OSADL Articles:

2024-10-02 12:00

Linux is now an RTOS!

PREEMPT_RT is mainline - What's next?


2023-11-12 12:00

Open Source License Obligations Checklists even better now

Import the checklists to other tools, create context diffs and merged lists


2023-03-01 12:00

Embedded Linux distributions

Results of the online "wish list"


2022-01-13 12:00

Phase #3 of OSADL project on OPC UA PubSub over TSN successfully completed

Another important milestone on the way to interoperable Open Source real-time Ethernet has been reached


2021-02-09 12:00

Open Source OPC UA PubSub over TSN project phase #3 launched

Letter of Intent with call for participation is now available



OSADL Projects

OSADL QA Farm on Real-time of Mainline Linux

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Number of cores/hyperthreads and bogoMIPS (x86 CPU strings, Intel names)

Box ↑ArchCoresMHzBogo​MIPSEffective
r0s0x86_​644 x 22,50040,00022.11. 01:10
r0s0sx86_​644 x 23,40054,39222.11. 01:11
r0s1x86_​644 x 22,30056,00022.11. 01:11
r0s1sx86_​644 x 23,30052,67222.11. 01:11
r0s2x86_​644 x 23,50055,87222.11. 01:12
r0s2sx86_​6410 x 13,70073,99022.11. 01:12
r0s3x86_​648 x 23,600115,20022.11. 01:13
r0s3sx86_​644 x 23,60067,20026.08. 01:14
r0s4x86_​648 x 23,600115,20022.11. 01:15
r0s4sx86_​648 x 23,600115,20022.11. 01:16
r0s5x86_​648 x 23,500115,20022.11. 01:16
r0s5sx86_​648 x 23,600115,20022.11. 01:17
r0s6x86_​648 x 23,600115,20022.11. 01:18
r0s6sx86_​6410 x 23,700147,98022.11. 01:18
r0s7x86_​648 x 23,600115,20022.11. 01:20
r0s7sx86_​642 x 23,70029,53226.08. 13:20
r0s8x86_​648 x 23,600115,20022.11. 01:21
r0s8sx86_​646 x 23,47083,37622.11. 01:21
r1s0x86_​644 x 13,10024,80022.11. 01:22
r1s1x86_​642 x 22,60021,69622.11. 01:23
r1s2x86_​644 x 12,30028,00022.11. 01:23
r1s2sx86_​644 x 12,30028,00022.11. 01:24
r1s3x86_​644 x 12,80022,42422.11. 01:24
r1s3sx86_​644 x 12,60020,88826.10. 13:42
r1s4arm​v7l2 x 11,2004822.11. 01:25
r1s4sarm​v7l2 x 14004822.11. 01:26
r1s5aarch​644 x 11,20079622.11. 01:26
r1s6x86_​642 x 22,13017,06422.11. 01:27
r1s6sx86_​642 x 21,66713,33222.11. 01:27
r1s7arm​v6l1 x 11,66753022.11. 01:28
r1s8i6861 x 21,6006,39822.11. 01:28
r1s8sx86_​644 x 11,90015,19622.11. 01:29
r2s0x86_​644 x 13,10024,80022.11. 01:29
r2s1arm​v5tejl1 x 120019922.11. 01:30
r2s2arm​v7l1 x 172049922.11. 01:30
r2s3arm​v7l0 x 1 x 162462422.11. 01:31
r2s3sarm​v7l0 x 2 x 16001,20022.11. 01:32
r2s4mips​641 x 180053124.12. 13:46
r2s5ppc1 x 13966622.11. 01:32
r2s5sarm​v7l4 x 11,20015222.11. 01:33
r2s6i6861 x 11,5002,99922.11. 01:34
r2s6saarch​644 x 11,3506422.11. 01:34
r2s7aarch​644 x 12,40043222.11. 01:35
r2s7saarch​644 x 11,50043222.11. 01:36
r2s8ppc1 x 14006622.11. 01:36
r3s0i6864 x 23,50055,99222.11. 01:37
r3s1i6864 x 12,40019,12722.11. 01:38
r3s2riscv641 x 11,00028422.11. 01:38
r3s2sriscv644 x 1028422.11. 01:39
r3s3x86_​646 x 23,33379,99222.11. 01:40
r3s4aarch​646 x 11,3009622.11. 01:41
r3s5i5861 x 113326522.11. 01:42
r3s5sppc2 x 11,20040022.11. 01:43
r3s6x86_​641 x 21,6606,66622.11. 01:44
r3s6sx86_​642 x 22,66721,33222.11. 01:44
r3s7i6861 x 15331,06622.11. 01:45
r3s8i6864 x 13,20027,36422.11. 01:46
r4s0x86_​642 x 22,30018,39622.11. 01:46
r4s1arm​v7l4 x 11,50072022.11. 01:47
r4s1sarm​v7l4 x 11,50086422.11. 01:47
r4s2arm​v7l1 x 180079622.11. 01:48
r4s2sarm​v7l1 x 180053022.11. 01:49
r4s3i5861 x 150099614.11. 01:56
r4s3si6861 x 11,4662,93228.07. 02:17
r4s4ppc4 x 11,20049822.11. 01:52
r4s5arm​v7l1 x 1500022.11. 01:55
r4s5saarch​644 x 11,60020022.11. 01:55
r4s6x86_​644 x 23,40054,25622.11. 01:56
r4s6sarm​v7l0 x 1 x 11,0006622.11. 01:57
r4s7i6864 x 11,83314,66422.11. 01:58
r4s7sx86_​642 x 11,8337,33222.11. 01:58
r4s8arm​v7l1 x 140039822.11. 01:59
r4s8sarm​v7l1 x 140039822.11. 02:00
r5s0x86_​642 x 22,20017,58222.11. 02:00
r5s1x86_​648 x 13,33353,45622.11. 02:01
r5s2x86_​644 x 12,70021,69922.11. 02:01
r5s2sx86_​644 x 24,00063,86312.04. 01:34
r5s3x86_​644 x 22,00031,87222.11. 02:02
r5s3sx86_​644 x 11,60012,74822.11. 02:02
r5s4x86_​642 x 22,53020,26422.11. 02:03
r5s4sx86_​642 x 22,53020,26422.11. 02:04
r5s5arm​v7l1 x 160059722.11. 02:06
r5s5sarm​v7l1 x 160060022.11. 02:09
r5s6ppc1 x 153313322.11. 02:12
r5s7arm​v7l1 x 15286422.11. 02:13
r5s7sarm​v7l1 x 15284822.11. 02:14
r5s8x86_​644 x 12,00015,97222.11. 02:16
r6s0x86_​642 x 10 x 21,700136,18022.11. 02:16
r6s1x86_​642 x 12,0007,97822.11. 02:17
r6s2x86_​642 x 11,6679,57822.11. 02:17
r6s3x86_​644 x 22,20035,12022.11. 02:17
r6s4x86_​642 x 11,1004,37622.11. 02:18
r6s5i6861 x 11,5002,99222.11. 02:19
r6s6i6861 x 11,6003,19222.11. 02:20
r6s7i6862 x 12,3009,17622.11. 02:20
r6s8x86_​642 x 22,30018,35622.11. 02:21
r7s0x86_​642 x 22,30018,40022.11. 02:21
r7s1x86_​644 x 11,60012,84022.11. 02:22
r7s2aarch​642 x 11,7009622.11. 02:22
r7s2sarm​v7l4 x 11,50072013.07. 02:16
r7s3arm​v6l1 x 1700522.11. 02:23
r7s3sarm​v7l4 x 11,40015222.11. 02:24
r7s4arm​v7l1 x 153634818.11. 14:28
r7s4sarm​v7l4 x 11,5001,08022.11. 02:25
r7s5i6861 x 11,3002,59322.11. 02:26
r7s6arm​v7l1 x 11,00039828.02. 14:10
r7s7x86_​644 x 11,60012,76722.11. 02:26
r7s7sx86_​642 x 22,30018,39622.11. 02:27
r7s8arm​v7l1 x 11,00099522.11. 02:27
r7s8sarm​v7l1 x 11,00079622.11. 02:28
r8s0x86_​642 x 22,30018,40022.11. 02:29
r8s1i5861 x 135070122.11. 02:29
r8s2x86_​642 x 22,10016,76022.11. 02:31
r8s2sx86_​642 x 22,10016,76022.11. 02:32
r8s3x86_​644 x 12,66721,28022.11. 02:32
r8s4x86_​644 x 21,60028,80022.11. 02:33
r8s4sx86_​644 x 21,60028,80022.11. 02:33
r8s5i6864 x 23,40054,40022.11. 02:34
r8s6arm​v7l1 x 150049822.11. 02:35
r8s6sx86_​644 x 13,30026,41622.11. 02:35
r8s7x86_​644 x 13,20025,49622.11. 02:36
r8s7sx86_​642 x 13,00011,98022.11. 02:36
r8s8x86_​642 x 11,3005,14422.11. 02:37
r9s0x86_​642 x 22,30018,40022.11. 02:37
r9s1x86_​642 x 12,0003,99222.11. 02:38
r9s1sarm​v7l1 x 101,25014.04. 18:03
r9s2x86_​644 x 11,60012,74822.11. 02:38
r9s2sx86_​644 x 11,60012,74830.08. 17:02
r9s3x86_​644 x 11,60012,74822.11. 02:39
r9s3sx86_​644 x 13,00024,00022.11. 02:40
r9s4i6861 x 21,0003,99022.11. 02:40
r9s4sx86_​642 x 11,3335,34722.11. 02:45
r9s5x86_​642 x 12,70010,77413.07. 03:15
r9s5sx86_​642 x 13,30013,19822.11. 02:46
r9s6x86_​642 x 23,00023,94422.11. 02:47
r9s7arm​v7l2 x 11,000022.11. 02:47
r9s8sarm​v7l1 x 180079622.11. 02:48
ras0x86_​642 x 22,30018,41722.11. 02:49
ras1i6861 x 11,4002,79922.11. 02:49
ras2x86_​642 x 11,0674,26622.11. 02:50
ras2sx86_​644 x 11,90015,05222.11. 02:50
ras3aarch​648 x 12,0004,00022.11. 02:50
ras3sarm​v7l1 x 11,30084022.11. 02:51
ras4arm​v7l1 x 150039822.11. 02:51
ras4sarm​v7l1 x 160059707.02. 02:45
ras5arm​v7l2 x 11,0002422.11. 02:52
ras5sarm​v7l2 x 11,0002422.11. 02:52
ras6aarch​648 x 12,0003,20022.11. 02:53
ras6sarm​v7l1 x 11,0001,98722.11. 02:54
ras7ppc1 x 13966522.11. 02:54
ras8x86_​644 x 11,60014,40022.11. 02:54
ras8sx86_​644 x 11,60012,74822.11. 02:55
rbs0i6862 x 22,50017,60022.11. 02:56
rbs1x86_​644 x 12,00015,97222.11. 02:56
rbs2x86_​644 x 12,00015,97222.11. 02:57
rbs2sx86_​641 x 13,500007.09. 15:06
rbs3arm​v7l4 x 19962422.11. 02:57
rbs3sarm​v7l4 x 11,40035622.11. 02:58
rbs4x86_​644 x 11,2009,60022.11. 02:59
rbs4sx86_​644 x 11,60012,74822.11. 02:59
rbs5i6864 x 2049,41522.11. 03:00
rbs5saarch​644 x 11,6006422.11. 03:00
rbs6x86_​644 x 11,91515,32422.11. 03:01
rbs6sx86_​642 x 11,3335,33229.08. 03:00
rbs7arm​v7l4 x 19961222.11. 03:02
rbs7sarm​v7l4 x 19962422.11. 03:03
rbs8arm​v7l2 x 16662,65022.11. 03:41
rbs8sx86_​644 x 22,40038,70422.11. 03:51
rcs0x86_​648 x 22,40076,60022.11. 03:53
rcs1x86_​646 x 23,46783,37622.11. 03:54
rcs2x86_​642 x 12,80011,23222.11. 03:55
rcs3i6862 x 11,4005,58622.11. 03:56
rcs3sx86_​644 x 13,30026,39622.11. 03:57
rcs4x86_​642 x 11,1004,37622.11. 03:57
rcs4sx86_​644 x 11,1008,75216.09. 03:07
rcs5x86_​642 x 12,80011,19822.11. 04:00
rcs5sx86_​642 x 12,80011,19822.11. 04:02
rcs6x86_​644 x 23,50063,99222.11. 04:03
rcs7x86_​642 x 21,80014,40022.11. 04:04
rcs7sx86_​644 x 11,50011,98022.11. 04:06
rcs8x86_​6416 x 23,700217,15222.11. 04:09
rcs8sx86_​644 x 23,30052,80022.11. 04:10
rds0x86_​644 x 21,80031,99222.11. 04:11
rds1x86_​644 x 11,91015,32422.11. 04:11
rds2x86_​644 x 11,60012,74822.11. 04:12
rds3x86_​644 x 11,60012,74822.11. 04:12
rds4x86_​644 x 11,91015,32422.11. 04:13
rds5x86_​644 x 11,60012,74822.11. 04:13
rds6x86_​644 x 11,60012,74822.11. 04:14
rds7x86_​644 x 11,60012,74822.11. 04:15
rds8x86_​644 x 11,60012,74822.11. 04:15
res0x86_​644 x 23,40054,39222.11. 04:16
res1x86_​644 x 11,60014,40022.11. 04:17
res1sx86_​644 x 11,60014,40022.11. 04:17
res2x86_​644 x 11,60014,40022.11. 04:17
res3x86_​644 x 12,00015,97222.11. 04:18
res3saarch​640 x 1 x 11,0001,60022.11. 04:18
res4x86_​644 x 11,90015,05222.11. 04:19
res4sx86_​644 x 11,90015,05222.11. 04:20
res5x86_​642 x 22,20019,20022.11. 04:20
res5sx86_​642 x 22,20019,20022.11. 04:21
res6x86_​644 x 11,1008,75222.11. 04:22
res6saarch​644 x 101,60022.11. 04:22
res7arm​v7l0 x 1 x 11,0001222.11. 04:23
res7sarm​v7l0 x 1 x 11,0001222.11. 04:24
res8x86_​644 x 11,90015,05222.11. 04:24
res8sx86_​644 x 11,90015,05222.11. 04:25
rfs0x86_​6416 x 22,000127,96822.11. 04:26
rfs1aarch​644 x 11,50043222.11. 04:26
rfs2aarch​644 x 11,50043222.11. 04:26
rfs3x86_​644 x 11,60012,74822.11. 04:27
rfs3sx86_​644 x 11,60012,74822.11. 04:27
rfs4arm​v7l1 x 180080022.11. 04:28
rfs4sarm​v7l1 x 180080022.11. 04:29
rfs6arm​v7l1 x 16671,33222.11. 04:31
rfs6sarm​v7l1 x 16671,33222.11. 04:31
rfs7x86_​644 x 22,60041,60022.11. 04:32
rfs7sx86_​644 x 17006,44822.11. 04:33
rfs8arm​v7l1 x 11,00012018.11. 15:47
 

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