Paul Thomas, AMSC

While tools such as cyclictest can give accurate results for general latency performance because the timestamp of the source is known, if the performance of a specific external interrupt handler is needed then a different method must be used.

This can be done using a hardware timer capture function to precisely timestamp an external interrupt, and then measure progress through the interrupt handler or into other kernel code.

This paper presents the general concepts to show how this is done, as well as provide a specific example with results. The example demonstrates the ZYNQ processor using TI's ads131e08 analog to digital converter. The ADC uses a standard SPI interface with an additional data ready output signal that can be used as an interrupt. In this case the data ready signal is additionally fed to a hardware capture block allowing for the hardware profiling. The timer capture function is implemented in the FPGA, but most embedded microprocessors have similar peripheral functions built in, which could be used.

The software setup is presented; kernel modules include: the industrial IO device driver, and the timer module. This setup uses a 4.0.7-rt4 #2 SMP PREEMPT RT kernel.

The results and latency plots of this this method are presented and compared to cyclictest estimations. They both give a similar view, but cyclictest is more optimistic.