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2024-06-26 - 16:10

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OSADL Articles:

2023-11-12 12:00

Open Source License Obligations Checklists even better now

Import the checklists to other tools, create context diffs and merged lists


2023-03-01 12:00

Embedded Linux distributions

Results of the online "wish list"


2022-01-13 12:00

Phase #3 of OSADL project on OPC UA PubSub over TSN successfully completed

Another important milestone on the way to interoperable Open Source real-time Ethernet has been reached


2021-02-09 12:00

Open Source OPC UA PubSub over TSN project phase #3 launched

Letter of Intent with call for participation is now available



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OSADL QA Farm on Real-time of Mainline Linux

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Number of cores/hyperthreads and bogoMIPS (by arch) - (x86 CPU strings)

BoxArch ↑CoresMHzBogo​MIPSEffective
ras6aarch​648 x 12,0003,20020.05. 17:01
res3saarch​640 x 1 x 11,0001,60026.06. 11:57
r4s5saarch​644 x 11,60020026.06. 15:33
r2s6saarch​644 x 11,3506426.06. 14:30
r2s7aarch​644 x 12,40043226.06. 14:31
res6saarch​644 x 101,60026.06. 12:07
rbs5saarch​644 x 11,6006425.06. 18:28
r1s5aarch​644 x 11,20079626.06. 14:11
rfs1aarch​644 x 11,50043226.06. 12:17
rfs2aarch​644 x 11,50043226.06. 12:17
r2s7saarch​644 x 11,50043226.06. 14:35
r3s4aarch​646 x 11,3009626.06. 14:48
ras3aarch​648 x 12,0004,00026.06. 10:24
r2s1arm​v5tejl1 x 120019926.06. 14:23
r1s7arm​v6l1 x 120053026.06. 14:16
r7s3arm​v6l1 x 1700526.06. 09:08
r9s8sarm​v7l1 x 180079626.06. 10:17
r2s2arm​v7l1 x 172049926.06. 14:23
r1s4arm​v7l2 x 11,2004826.06. 14:09
r4s2sarm​v7l1 x 180053026.06. 15:18
r7s8arm​v7l1 x 11,00099526.06. 09:27
ras5arm​v7l2 x 11,0002426.06. 10:26
r7s4arm​v7l1 x 153634826.06. 09:18
r4s2arm​v7l1 x 180079626.06. 15:15
rbs3arm​v7l4 x 19962826.06. 10:41
r7s3sarm​v7l4 x 11,40035626.06. 09:15
ras4arm​v7l1 x 150039826.06. 10:25
r7s4sarm​v7l4 x 11,5001,08026.06. 09:21
r4s8sarm​v7l1 x 140039826.06. 15:47
rfs4sarm​v7l1 x 180080026.06. 12:28
r4s1sarm​v7l4 x 11,5001,08026.06. 15:11
r7s6arm​v7l1 x 11,00039828.02. 14:10
ras5sarm​v7l2 x 11,0002426.06. 10:27
r4s1arm​v7l4 x 11,5001,08026.06. 15:08
res7arm​v7l0 x 1 x 11,0001226.06. 12:10
rbs7sarm​v7l4 x 19962426.06. 10:54
rfs4arm​v7l1 x 180080026.06. 12:18
ras3sarm​v7l1 x 11,30084025.06. 18:02
r7s8sarm​v7l1 x 11,00099626.06. 09:28
r9s7arm​v7l2 x 11,000025.06. 17:53
rfs6sarm​v7l1 x 16671,33226.06. 12:39
res7sarm​v7l0 x 1 x 11,0001212.01. 05:12
r1s4sarm​v7l2 x 14004826.06. 14:10
r8s6arm​v7l1 x 150049826.06. 09:48
r5s5sarm​v7l1 x 160060026.06. 04:17
r2s3sarm​v7l0 x 1 x 16001,20026.06. 14:26
rbs3sarm​v7l4 x 11,40035626.06. 10:42
r5s7arm​v7l1 x 15286426.06. 04:25
rfs6arm​v7l1 x 16671,33226.06. 12:38
r9s1sarm​v7l1 x 101,25014.04. 18:03
rbs7arm​v7l4 x 19962826.06. 10:52
r5s5arm​v7l1 x 160059726.06. 16:08
ras4sarm​v7l1 x 160059707.02. 02:45
rbs8arm​v7l2 x 16662,65026.06. 10:57
r4s5arm​v7l1 x 1500026.06. 15:31
r4s6sarm​v7l0 x 1 x 11,0006626.06. 15:39
r4s8arm​v7l1 x 140039826.06. 15:45
r7s2sarm​v7l4 x 11,50072013.07. 02:16
r5s7sarm​v7l1 x 15284826.06. 04:28
r2s3arm​v7l0 x 1 x 162462426.06. 14:24
ras6sarm​v7l1 x 11,0001,98726.06. 10:29
r4s3i5861 x 150099626.06. 15:23
r8s1i5861 x 135070126.06. 09:32
r3s5i5861 x 113326526.06. 14:56
r9s4i6861 x 21,0003,99026.06. 10:03
r3s8i6866 x 13,20038,52626.06. 15:04
rbs5i6864 x 2049,53925.06. 18:27
r6s6i6861 x 11,6003,19126.06. 08:59
r2s6i6861 x 11,5002,99926.06. 14:27
r6s5i6861 x 11,5001,12226.06. 08:57
rbs0i6862 x 22,50017,60026.06. 10:37
ras1i6861 x 11,4002,79926.06. 10:21
r4s3si6861 x 11,4662,93226.06. 15:25
r7s5i6861 x 11,3002,59326.06. 09:22
r3s0i6864 x 23,50055,99226.06. 14:38
r1s8i6861 x 21,6006,39826.06. 14:17
r6s7i6862 x 12,3009,17626.06. 09:01
r8s5i6864 x 23,40054,40026.06. 09:46
rcs3i6862 x 11,4005,58826.06. 11:12
r3s1i6864 x 12,40019,12726.06. 14:40
r3s7i6861 x 15331,06626.06. 15:02
r4s7i6864 x 11,83314,66426.06. 15:41
r2s4mips​641 x 180053124.12. 13:46
r5s6ppc1 x 153313326.06. 04:24
r2s8ppc1 x 14006626.06. 14:37
ras7ppc1 x 13966526.06. 10:31
r2s5ppc1 x 13966627.03. 13:43
r4s4ppc4 x 11,20049826.06. 15:27
r3s5sppc2 x 11,20040026.06. 02:57
r3s2sriscv644 x 1028426.06. 14:44
r3s2riscv641 x 11,00028426.06. 14:42
rds3x86_​644 x 11,91015,32426.06. 11:44
ras0x86_​642 x 22,30018,41626.06. 10:19
r9s3x86_​644 x 11,60012,74826.06. 09:59
r0s4x86_​648 x 23,600115,20026.06. 13:28
r6s0x86_​642 x 10 x 21,700136,18026.06. 04:31
rbs8sx86_​644 x 22,40038,70426.06. 11:01
r1s3sx86_​644 x 12,60020,88826.10. 13:42
r9s2x86_​644 x 11,60012,74826.06. 09:57
r9s5sx86_​642 x 13,50013,99826.06. 10:12
r1s0x86_​644 x 13,10024,80026.06. 13:59
rcs7sx86_​644 x 11,50011,98026.06. 11:28
r1s8sx86_​644 x 11,90015,19626.06. 14:20
r9s5x86_​642 x 12,70010,77413.07. 03:15
r9s0x86_​642 x 22,30018,39626.06. 09:53
rds6x86_​644 x 11,60012,74825.06. 19:41
res8sx86_​644 x 11,90015,05226.06. 12:14
r5s3x86_​644 x 22,00031,87226.06. 15:55
ras8sx86_​644 x 11,60012,74826.06. 10:34
r0s7x86_​648 x 23,600115,20026.06. 13:44
r0s2sx86_​6410 x 13,70073,99026.06. 13:17
rfs0x86_​6416 x 22,000128,00026.06. 12:16
r5s2x86_​644 x 12,70021,69926.06. 15:51
r0s8x86_​648 x 23,600115,20026.06. 13:53
rbs4sx86_​644 x 11,60012,74826.06. 10:48
rcs4sx86_​644 x 11,1008,75226.06. 11:19
r9s4sx86_​642 x 11,3335,34726.06. 10:09
r1s3x86_​644 x 12,80022,42426.06. 14:07
res2x86_​644 x 11,60014,40026.06. 11:54
r8s7sx86_​642 x 13,30013,19826.06. 09:49
rcs6x86_​644 x 23,50063,99225.06. 19:13
r5s1x86_​646 x 13,33340,09226.06. 15:50
rcs1x86_​646 x 23,46783,37626.06. 11:08
r0s1sx86_​644 x 23,30052,67226.06. 13:13
r0s0x86_​644 x 22,50040,00026.06. 13:10
res8x86_​644 x 11,90015,05226.06. 12:12
r6s8x86_​642 x 22,30018,35626.06. 09:03
res1x86_​644 x 11,60014,40026.06. 11:52
r0s2x86_​644 x 23,50055,86426.06. 13:15
rds8x86_​644 x 11,60012,74826.06. 11:48
rbs4x86_​644 x 11,2009,60026.06. 10:46
r4s6x86_​644 x 23,40054,25626.06. 15:34
r3s6sx86_​642 x 22,66721,33226.06. 15:00
rbs2x86_​644 x 12,00015,97226.06. 10:40
r0s3x86_​648 x 23,600115,20026.06. 13:19
res4sx86_​644 x 11,90015,05226.06. 11:58
r4s7sx86_​642 x 11,8337,33226.06. 15:43
r0s7sx86_​642 x 23,70029,52826.06. 13:51
res6x86_​644 x 11,1008,75226.06. 12:05
r0s5x86_​648 x 23,500115,20026.06. 13:33
r8s0x86_​642 x 22,30018,40026.06. 09:29
r5s3sx86_​644 x 11,60012,74826.06. 15:57
r6s3x86_​644 x 22,20035,11221.06. 15:54
r7s1x86_​644 x 11,60012,84026.06. 09:06
rbs1x86_​644 x 12,00015,97226.06. 10:38
rds4x86_​644 x 11,91015,32426.06. 11:46
rcs8sx86_​644 x 23,30052,79226.06. 11:37
r6s2x86_​642 x 11,6679,57826.06. 08:53
rcs8x86_​6416 x 23,700217,15226.06. 11:35
r8s4x86_​644 x 21,60028,80026.06. 09:42
rcs0x86_​648 x 22,40076,60026.06. 11:06
rbs6sx86_​642 x 11,3335,33226.06. 10:51
r9s3sx86_​644 x 13,00024,00026.06. 10:01
r1s1x86_​642 x 22,60021,69626.06. 14:01
res4x86_​644 x 11,90015,05225.06. 19:57
r8s7x86_​642 x 12,70010,77625.06. 17:23
r0s8sx86_​646 x 23,47083,38826.06. 13:56
r5s4sx86_​642 x 22,53020,26426.06. 16:03
r8s8x86_​642 x 11,3005,14426.06. 09:52
r7s7sx86_​642 x 22,30018,39626.06. 09:24
ras2x86_​642 x 11,0674,26626.06. 10:22
rds2x86_​644 x 11,91015,32426.06. 11:42
r4s0x86_​642 x 22,30018,39626.06. 15:06
res3x86_​644 x 12,00015,97226.06. 11:56
r8s2x86_​642 x 22,10016,76026.06. 09:36
rbs6x86_​644 x 11,91515,32425.06. 18:30
r0s1x86_​644 x 22,30055,99226.06. 13:11
r3s3x86_​646 x 23,33379,99226.06. 14:46
r9s2sx86_​644 x 11,60012,74830.08. 17:02
rcs5sx86_​642 x 12,80011,19826.06. 11:25
res0x86_​644 x 21,80031,99226.06. 11:50
r5s0x86_​642 x 22,20017,58126.06. 15:48
r8s4sx86_​644 x 21,60028,80026.06. 09:44
rcs3sx86_​644 x 23,30052,69626.06. 11:14
r9s1x86_​642 x 12,0003,99226.06. 09:56
r7s7x86_​644 x 11,60012,76725.06. 16:57
res5sx86_​642 x 22,20019,20026.06. 12:03
r9s6x86_​642 x 23,00023,94426.06. 10:14
r1s6x86_​642 x 22,13017,06426.06. 14:12
rcs7x86_​642 x 21,80014,39626.06. 11:27
r1s2sx86_​644 x 12,30028,00026.06. 14:05
r0s6sx86_​6410 x 23,700147,98026.06. 13:40
r3s6x86_​641 x 11,6603,33326.06. 14:59
r1s6sx86_​642 x 21,66713,33226.06. 14:15
rcs5x86_​642 x 12,80011,19826.06. 11:21
rds0x86_​644 x 21,80031,99226.06. 11:39
res1sx86_​644 x 11,60014,40026.06. 11:53
rds7x86_​644 x 11,60012,74825.06. 19:43
r5s2sx86_​644 x 24,00063,86312.04. 01:34
rcs2x86_​642 x 12,80011,23226.06. 11:11
r5s4x86_​642 x 22,53020,26426.06. 16:01
rcs4x86_​642 x 11,1004,37626.06. 11:17
r8s3x86_​644 x 12,66721,28026.06. 09:40
r2s0x86_​644 x 13,10024,80026.06. 14:20
r1s2x86_​644 x 12,30028,00026.06. 14:03
r0s3sx86_​644 x 23,60067,20026.06. 13:25
r6s1x86_​642 x 12,0007,97826.06. 04:32
r7s0x86_​642 x 22,30018,40026.06. 09:05
rds1x86_​644 x 11,91015,32426.06. 11:41
r0s6x86_​648 x 23,600115,20026.06. 13:37
r8s2sx86_​642 x 22,10016,76026.06. 09:38
r0s4sx86_​648 x 23,600115,20026.06. 13:30
rbs2sx86_​641 x 13,500007.09. 15:06
r6s4x86_​642 x 11,1004,37626.06. 08:54
rds5x86_​644 x 11,60012,74825.06. 19:39
ras8x86_​644 x 11,60014,40026.06. 10:32
res5x86_​642 x 22,20019,20026.06. 12:01
r0s5sx86_​648 x 23,600115,20026.06. 13:35
 

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